Antifuse Memory Potential Difference Control for False Write Prevention
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Solution Overview
Problem
Conventional electrically programmable non-volatile OTP memory using antifuse technology faces challenges with boosting write voltage, leading to false writes due to uneven voltage distribution across the gate oxide, which affects the reliability and accuracy of data storage.
Innovation Solution
A semiconductor memory device configuration that includes a write voltage source, an antifuse connected to a network of transistors and controllers, which manage and control the potential difference between the write voltage source and the antifuse, ensuring a balanced voltage application to prevent false writes by using a sense node and a potential difference controller to accumulate charge and regulate the voltage across the antifuse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write voltage is boosted to break down the gate oxide of the antifuse, then programming capability is achieved, but false write occurs due to uneven voltage distribution
Solution Approach 1:
The patent introduces a potential difference controller as an intermediary component between the write voltage source and the antifuse. This controller manages the voltage distribution by accumulating charge on the sense node, ensuring that the potential difference across the antifuse gate oxide is evenly controlled during programming, thereby preventing false write while maintaining programming capability
Solution Approach 2:
The patent dynamically adjusts voltage parameters during the programming process. By controlling the potential difference between the write voltage source and the antifuse through charge accumulation on the sense node, the system optimizes the voltage distribution to achieve reliable breakdown of the gate oxide without causing false write conditions
2Adaptability or versatility
If one end of the antifuse is connected to write voltage source and the other to read circuit, then electrical programmability is achieved, but voltage boosting causes uneven distribution across gate oxide
Solution Approach 1:
The potential difference controller serves as a mediator that manages the voltage distribution between the write voltage source and the antifuse. By accumulating charge on the sense node, it ensures uniform voltage distribution across the gate oxide during programming, resolving the uneven voltage distribution problem while maintaining electrical programmability
Solution Approach 2:
The patent implements equipotentiality by controlling the potential difference across the antifuse through charge accumulation on the sense node. This ensures that the voltage is evenly distributed across the gate oxide during programming, preventing localized breakdown and ensuring reliable programming operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents false writes during data storage by managing the potential difference between the write voltage source and the antifuse, enhancing the reliability and accuracy of data storage in semiconductor memory devices.
Implementation Method 1
a potential difference controller configured to accumulate charge on the sense node to control the potential difference placed between both ends of the antifuse
Implementation Method 2
a MOSFET including a thin gate oxide, to which gate oxide a high voltage is applied to break down the insulator to store information
Data Source
AI summary
A write voltage source is capable of applying a write voltage, which is a high voltage. An antifuse is connected at one end to the write voltage source and has a resistance irreversibly variable based on the write voltage. A sense node is connectable to the other end of the antifuse. A sense amp compares the potential on the sense node with a reference potential. The sense node is used to accumulate charge thereon. To control the potential difference placed between both ends of the antifuse, a third transistor is provided having one end connected to the sense node. The third transistor is provided with a precharge voltage source on the other end, and a precharge controller operative to on/off control the gate.