Anti-Fuse Memory Device Concomitant Programming Isolation
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Solution Overview
Problem
Concomitant programming of anti-fuse elements in semiconductor memory devices is challenging due to potential drops induced by program current, leading to unsuccessful breakdown and increased programming time and costs.
Innovation Solution
A semiconductor memory device configuration with first and second anti-fuse elements of different conductivity types, isolated by a third region of opposite conductivity type, allows for simultaneous programming by maintaining a desired potential difference between gate electrodes and substrates, preventing interference and ensuring effective voltage application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple anti-fuse elements are programmed concomitantly, then programming time is reduced, but potential drop induced by program current causes unsuccessful breakdown
Solution Approach 1:
The substrate surface is divided into multiple isolated regions with different conductivity types (first region with first conductivity type, second region with second conductivity type). Each region contains anti-fuse elements that can be programmed independently without interfering with each other. This segmentation allows multiple regions to be programmed concomitantly while maintaining proper voltage levels in each region, resolving the contradiction between programming speed and breakdown success rate.
2Reliability
If anti-fuse elements are programmed sequentially one by one, then breakdown reliability is maintained, but programming time increases significantly
Solution Approach 1:
The substrate is divided into multiple isolated regions that can be programmed simultaneously. Each region maintains its own potential independently due to the isolation by regions of opposite conductivity type, allowing reliable breakdown in each region while reducing total programming time through parallel operation.
Solution Approach 2:
Regions of opposite conductivity type act as intermediaries that isolate the potential changes in one region from affecting other regions. This intermediary structure enables multiple regions to be programmed concomitantly without the potential drop problem that would occur in a unified substrate, thus maintaining reliability while improving speed.
3Productivity
If programming voltage is applied to multiple anti-fuse elements simultaneously, then programming efficiency improves, but substrate potential increase prevents desired voltage application
Solution Approach 1:
Dividing the substrate into multiple isolated regions with different conductivity types creates independent potential zones. Each region can have its programming voltage applied and maintained independently, simplifying potential control while enabling efficient concomitant programming across multiple regions.
Solution Approach 2:
Different regions of the substrate are given different conductivity types (first conductivity type vs. second conductivity type), creating local quality differences. This allows each region to maintain its own electrical characteristics and potential level independently, enabling efficient simultaneous programming without complex global potential management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables successful concomitant programming of multiple anti-fuse elements, reducing programming time and testing costs by maintaining optimal voltage levels across each element.
Implementation Method 1
a third region formed between the first region and the second region in a surficial portion of the substrate so as to isolate the first region and the second region, wherein the first region and the second region have a first conductive type, and the third region has a second conductive type opposite to the first conductive type
Implementation Method 2
Write-in operation (programming) into the anti-fuse memory is accomplished by causing breakdown of a gate insulating film in each anti-fuse element, to thereby electrically connect a gate electrode and an impurity-diffused region formed in a surficial portion of a substrate
Implementation Method 3
the anti-fuse elements internally causing breakdown generate hot carriers in the channels between sites of breakdown of the gate insulating film and the source (W)
Implementation Method 4
holes are injected from the anti-fuse elements to the substrate
Data Source
AI summary
A semiconductor memory device includes a first anti-fuse element and a second anti-fuse element, respectively composed of a transistor, wherein the first anti-fuse element and the second anti-fuse element are configured so as to be concomitantly programmable, respectively formed in P-wells on a substrate, and the adjacent P-wells are isolated by N-wells of an opposite conductivity type, formed therebetween.