Antifuse With Stepped Gate Insulator for Stable Rupture
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor device repair processes after packaging face challenges in stabilizing current levels during antifuse rupture, leading to unreliable operation and defects in devices like DRAMs and flash RAMs.
Innovation Solution
The antifuse is designed with a selectively epitaxial-grown silicon growth layer and a gate insulating layer having a stepped portion with a lower thickness at the bottom corner, which is ruptured by a high voltage applied to a contact plug, ensuring stable current levels and controlled rupture at a specific point.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional antifuse structure with uniform gate insulating layer is used, then the fabrication process is simple, but the current level becomes unstable during rupture leading to unreliable operation
Solution Approach 1:
The gate insulating layer is designed with non-uniform thickness, featuring a stepped portion with reduced thickness at specific locations. This local variation creates a predetermined rupture point that ensures stable current flow during antifuse breakdown, resolving the contradiction between operational stability and structural simplicity.
2Manufacturing precision
If high voltage is applied to rupture the antifuse, then electrical connection is established, but uncontrolled rupture occurs leading to defective devices
Solution Approach 1:
The stepped portion of the gate insulating layer is formed during the fabrication process before the rupture occurs. This preliminary structural preparation ensures that when high voltage is applied, the rupture occurs at the predetermined thinner region, achieving precise rupture control without complicating the overall fabrication process.
3Manufacturing precision
If the gate insulating layer thickness is reduced at a specific point, then controlled rupture is achieved, but the voltage level difference increases causing instability
Solution Approach 1:
The gate insulating layer thickness parameter is strategically varied to create a stepped structure. By controlling the thickness reduction at specific locations rather than uniformly reducing thickness, the patent achieves both precise rupture location control and maintains voltage stability during operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows the antifuse to operate stably by reducing voltage level differences after rupture, improving the reliability of semiconductor devices and reducing defects in packaged devices.
Implementation Method 1
a gate insulating layer formed over the first active region and the second active region; and a gate electrode formed over the gate insulating layer... ruptured by a high voltage applied to a contact plug
Data Source
AI summary
An antifuse of a semiconductor device and a method of fabricating the same capable of causing an antifuse to stably operate by rupturing the antifuse at a specific point and stabilizing a current level when rupturing the antifuse are provided. The antifuse may include: a device isolation layer defining a first active region in a semiconductor substrate; a first and second junction regions provided in the first active region; a second active region formed over the first junction region; a gate insulating layer formed over the first active region and the second active region; and a gate electrode formed over the gate insulating layer.