Antifuse Structure Enclosing Transistor for Semiconductor Area Reduction
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Solution Overview
Problem
Existing semiconductor structures with antifuse configurations face challenges such as increased dimension due to antifuse structure size matching transistor size, limited re-fusibility, and difficulty in detecting the ruptured state, leading to inefficiencies and manufacturing complexities.
Innovation Solution
A semiconductor structure incorporating an antifuse structure with a first conductive portion, a fusible portion, and a second conductive portion, where the antifuse encloses the transistor, allowing for reduced area occupation and re-fusibility, with the fusible portion's rupture changing the current flow and enabling state transition, and a method involving voltage changes to control the antifuse structure's state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the antifuse structure is designed with conventional configurations, then the manufacturing process is straightforward, but the semiconductor dimension increases due to antifuse structure size matching transistor size
Solution Approach 1:
The antifuse structure is enclosed within the transistor structure, with the first conductive portion forming a pattern that surrounds the transistor. This nesting approach allows the antifuse to share space with the transistor, reducing the overall semiconductor dimension while maintaining both structures' functionality.
Solution Approach 2:
The antifuse structure and transistor are integrated into a shared layout where the first conductive portion of the antifuse encloses the transistor. This merging of structures eliminates the need for separate antifuse and transistor areas, thereby reducing the total semiconductor dimension.
2Adaptability or versatility
If the antifuse structure uses conventional designs, then the structure is simple, but re-fusibility is limited
Solution Approach 1:
The fusible portion is designed to be reconfigurable, allowing it to be reset from a ruptured state back to an intact state. This dynamic property enables multiple programming cycles, enhancing re-fusibility and adaptability of the antifuse structure for iterative manufacturing processes.
3Productivity
If the fusible portion rupture state is not detectable, then the structure remains simple, but manufacturing efficiency decreases due to inability to detect ruptured state
Solution Approach 1:
The structure provides detectable feedback when the fusible portion ruptures, allowing manufacturing systems to identify the ruptured state. This feedback mechanism enables real-time monitoring and sorting of programmed devices, improving manufacturing efficiency by eliminating the need for destructive testing or complex post-processing inspection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure reduces semiconductor dimension, enhances re-fusibility, and allows for detection of the ruptured state through current changes, improving manufacturing efficiency and adaptability.
Implementation Method 1
the fusible portion is disposed on the first conductive portion. The second conductive portion is disposed on the fusible portion... When the fusible portion is ruptured, the second conductive portion and the semiconductor substrate are electrically connected
Data Source
AI summary
The present disclosure provides a semiconductor structure employing an antifuse structure and a controlling method of the semiconductor structure. The semiconductor structure includes a semiconductor substrate, a transistor and an antifuse structure. The transistor is disposed on the semiconductor substrate. The antifuse structure is disposed on the semiconductor substrate and adjacent to the transistor. The antifuse structure includes a first conductive portion, a fusible portion and a second conductive portion. The first conductive portion is disposed in the semiconductor substrate. The fusible portion is disposed on the first conductive portion. The second conductive portion is disposed on the fusible portion. The antifuse structure encloses the transistor in a top view.