Antifuse Memory Circuit Voltage Control for Transistor Breakdown Prevention
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Solution Overview
Problem
The existing semiconductor storage devices using antifuse elements require high breakdown-voltage transistors due to coupling actions, which complicates the design and increases the size of the devices, and there is a need to prevent the breakdown of the gate oxide film during writing operations.
Innovation Solution
The semiconductor storage device employs a configuration with a first and second voltage generation circuit, a power supply circuit, and a level shifter circuit to control the voltage applied to the antifuse memory circuit, ensuring that the potential difference between the terminals does not exceed the threshold for breaking the gate oxide film, thereby using transistors with lower breakdown voltages and preventing oxide film breakdown during writing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If an antifuse element with capacitor structure is used to downsize the semiconductor storage device, then the device size is reduced, but a high breakdown-voltage transistor is required due to coupling action
Solution Approach 1:
A level shifter circuit is introduced as an intermediary component between the control circuit and the antifuse memory circuit. This level shifter circuit converts the control signal voltage level to match the requirements of the antifuse circuit, thereby eliminating the need for high breakdown-voltage transistors in the control circuit while maintaining the compact antifuse structure
Solution Approach 2:
The patent changes the voltage parameter of the control signal by using a level shifter circuit that transforms the voltage level from the control circuit domain to the memory circuit domain. This parameter transformation allows standard low breakdown-voltage transistors to be used in the control circuit while still controlling the high-voltage antifuse operation
2Productivity
If high voltage is applied to write data into the antifuse element, then data writing is achieved, but the gate oxide film of the transistor may break down
Solution Approach 1:
The patent segments the voltage generation and control functions into separate circuits: a power supply circuit that generates the high write voltage, a level shifter circuit that controls the timing and level of control signals, and the antifuse memory circuit that receives the segmented control signals. This segmentation ensures that high voltage is applied only to the antifuse element while the control transistors operate at safe voltage levels
Solution Approach 2:
The level shifter circuit acts as a mediator that translates control signals from the control circuit to the antifuse memory circuit with appropriate voltage levels and timing. This intermediary ensures that transistors in the control circuit never experience voltage levels that could cause gate oxide breakdown, while still enabling high-voltage writing operations in the memory circuit
Data Source
AI summary
A semiconductor storage device according to the present embodiment includes an antifuse element and a first element. The antifuse element is connected at one end to a first terminal to which a write voltage is applicable, and includes a gate oxide film. The first element is connected to the other end of the antifuse element. In a case where the write voltage that breaks the gate oxide film is supplied to the first terminal and the gate oxide film is not broken, the first element supplies a second potential that makes a potential difference between the one end and the other end less than a potential that breaks the gate oxide film, to the other end.