APC Queued FDTD Modeling for PCI Bandwidth Reduction

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Solution Overview

Problem

Current GPU implementations of finite difference time domain (FDTD) modeling for oil and gas exploration are limited by memory capacity, which restricts the size of problems that can be handled, despite their high computational throughput, due to the need for domain decomposition and slow data transfer between system memory and compute accelerators.

Innovation Solution

The method involves using multiple accelerated processing components (APCs) to perform multiple timesteps on smaller pieces of the computational domain in a queued manner, amortizing the cost of data transfer and achieving linear scaling of PCI throughput, allowing the algorithm to scale up to more than 64 compute accelerators.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If domain decomposition is used to split computational domain into smaller pieces for each compute accelerator, then memory capacity limitation is addressed, but the size of problem that can be handled is limited by aggregate memory of all compute accelerators

Engineering Contradiction:
Improvememory capacityVSAvoidproblem size handling
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The computational domain is divided into multiple sub-domains that can be processed by different compute accelerators. Each accelerator handles a portion of the data volume, enabling the system to tackle problems larger than any single accelerator's memory capacity while maintaining efficient parallel processing.

Inventive Principle:
Principle #1Segmentation

2Productivity

If data is transferred between system memory and compute accelerator memory, then computational throughput is achieved, but transfer speed is slow and PCI bandwidth is consumed

Engineering Contradiction:
Improvecomputational throughputVSAvoiddata transfer speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

Data is pre-loaded into compute accelerator memory in optimized batches before computational tasks are executed. This preliminary data preparation reduces the frequency and volume of data transfers during computation, amortizing the transfer cost over multiple computational operations and improving overall throughput.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If multiple compute accelerators are used to handle larger data volumes, then memory capacity is increased, but PCI bandwidth requirement increases proportionally

Engineering Contradiction:
Improvedata volume capacityVSAvoidPCI bandwidth consumption
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The system maintains continuous computational workflows across multiple accelerators with optimized data flow patterns. By keeping data in accelerator memory and performing multiple computational passes on the same data without repeated transfers to system memory, the system achieves linear scaling of processing capacity without proportional increases in PCI bandwidth consumption.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9995835B2System and method of implementing finite difference time domain models with multiple accelerated processing components (APCS)
Publication Date: 2018.06.12 CHEVRON USA INC
  • US9995835B2 patent drawing
  • US9995835B2 patent drawing
  • US9995835B2 patent drawing

AI summary

Embodiments of a method for implementing a finite difference time domain modeling with multiple APCs are disclosed herein. The disclosed methods and systems overcome the memory capacity limitation of APCs by having each APC perform multiple timesteps on a small piece of the computational domain or data volume in a APC queued manner. The cost of transferring data between host and compute accelerator can then be amortized over multiple timesteps, greatly reducing the amount of PCI bandwidth required to sustain high propagation speeds. The APC queued nature of the algorithm achieves linear scaling of PCI throughput with increasing number of APCs, allowing the algorithm to scale up to many dozens of APCs in some embodiments.