Dynamic Power Allocation Between APU and dGPU
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Solution Overview
Problem
High-performance computing devices face challenges in managing power distribution between integrated and discrete coprocessors to balance performance and thermal constraints, particularly in ultra-thin platforms where concurrent operation at full thermal design point (TDP) and total graphics power (TGP) is limited by thermal capacity, leading to suboptimal performance and user discomfort.
Innovation Solution
A system management unit (SMU) dynamically allocates power between integrated and discrete coprocessors based on workload characteristics and thermal constraints, using power distribution circuitry to shift power from one coprocessor to another and adjust voltage and frequency to maintain skin temperature within comfortable limits, while adhering to a shared platform power limit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If power is allocated to both APU and dGPU at full TDP and TGP concurrently, then computing performance is improved, but thermal capacity is exceeded causing device overheating
Solution Approach 1:
The patent implements dynamic power allocation between APU and dGPU based on real-time thermal conditions and workload characteristics. The system continuously monitors temperature and adjusts power distribution accordingly, transitioning from static to dynamic control to resolve the contradiction between performance and thermal management.
Solution Approach 2:
The system changes power allocation parameters dynamically based on thermal headroom and workload type. When thermal capacity allows, power is increased to both processors; when thermal limits are approached, power is reallocated or reduced. This parameter adjustment resolves the contradiction by adapting power levels to thermal conditions.
2Temperature
If power is limited to meet thermal constraints, then device temperature is controlled, but computing performance deteriorates
Solution Approach 1:
The patent applies different power allocation strategies to different processors based on local conditions. The APU and dGPU receive customized power levels according to their respective workload characteristics and the system's thermal state, rather than applying uniform power limits. This localized approach maintains performance where possible while controlling temperature.
Solution Approach 2:
The system applies partial power allocation to processors based on thermal headroom. Rather than completely limiting power when thermal constraints are active, the system allocates sufficient power to maintain acceptable performance while staying within thermal bounds, using partial action to balance both requirements.
3Device complexity
If static power limits are applied to APU and dGPU, then thermal management is simplified, but power utilization efficiency deteriorates
Solution Approach 1:
The patent implements feedback-based power management where the system monitors thermal conditions, workload characteristics, and processor performance, then adjusts power allocation accordingly. This closed-loop control optimizes power utilization efficiency while maintaining manageable complexity through automated decision-making based on sensor feedback.
Solution Approach 2:
The system performs self-adjustment of power allocation based on monitored conditions without requiring complex external control. The power management unit automatically responds to thermal and workload changes, enabling the system to optimize its own power utilization while keeping the control architecture relatively simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances performance by optimizing power usage between core and graphics intensive workloads, maintaining device safety and user comfort by dynamically adjusting power distribution to prevent overheating, thereby improving overall system efficiency and user experience.
Implementation Method 1
The APU and the dGPU are therefore connected to heat dissipation systems such as heat pipes that move heat away from the APU and dGPU towards corresponding heatsinks that dissipate thermal energy into the environment
Implementation Method 2
heatsinks that dissipate thermal energy into the environment
Implementation Method 3
heatsinks that dissipate thermal energy into the environment
Data Source
AI summary
An integrated coprocessor such as an accelerated processing unit (APU) generates commands for execution on a discrete coprocessor such as a discrete graphics processing unit (dGPU). Power distribution circuitry selectively provides power to the APU and the dGPU based on characteristics of workloads executing on the APU and the dGPU and based on a platform power limit that is shared by the APU and the dGPU. In some cases, the power distribution circuitry determines a first power provided to the APU and a second power provided to the dGPU. The power distribution circuitry increases the second power provided to the dGPU in response to a sum of the first and second powers being less than the platform power limit. In some cases, the power distribution circuitry modifies the power provided to the APU, the dGPU, or both in response to changes in temperatures measured by a set of sensors.