Aperture Compression for Multi-GPU Memory Access
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Solution Overview
Problem
In multi-GPU systems, there is a lack of efficient data transfer mechanisms between GPUs due to the limited PCI Express bus aperture, which restricts memory-to-memory transfers and lacks support for multiple independent data streams with distinct rules, leading to performance bottlenecks and synchronization penalties.
Innovation Solution
A hardware-based aperture compression system that uses dynamic base addresses and tags to enable addressing large memory spaces through a limited bus aperture, allowing multiple independent data streams with selective ordering and prioritization, and transparently managing memory requests across GPUs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory is mapped into system bus space for efficient transfers, then data transfer efficiency is improved, but the aperture size limits the addressable memory space
Solution Approach 1:
The system segments the large memory space into multiple aperture windows, each accessible through a separate stream. Multiple streams (stream 0, stream 1, etc.) allow different aperture windows to be active simultaneously, enabling access to memory regions beyond the single aperture limit while maintaining efficient mapped access.
Solution Approach 2:
The patent adds a stream dimension to the traditional single-aperture model. By introducing multiple independent streams with their own aperture windows, the system transforms the limited single-dimension aperture into a multi-dimensional address space that can accommodate larger total memory while maintaining efficient mapped transfers.
2Reliability
If strictly ordered reads and writes are enforced on the system bus, then data integrity is improved, but synchronization penalties increase
Solution Approach 1:
The system applies different ordering rules to different streams locally. Each stream can be configured with its own ordering semantics (ordered or unordered), allowing the system to enforce strict ordering only where needed for data integrity while allowing unordered access in other streams to reduce synchronization overhead.
Solution Approach 2:
The ordering rules are made dynamic and configurable per stream rather than being fixed globally. This allows the system to adapt the level of ordering enforcement based on the specific requirements of each data stream, balancing data integrity requirements against synchronization performance.
3Area of stationary object
If software programmable offsets are used to provide windows into larger memory space, then addressable memory space is improved, but the approach fails when a single chunk of memory exceeds the window size
Solution Approach 1:
The system segments large memory regions into multiple aperture windows that can be accessed through different streams. When a memory chunk exceeds the window size, it can be divided across multiple streams, each handling a portion within its aperture window, thus solving the limitation of software offsets.
Solution Approach 2:
The patent introduces stream identifiers and aperture window management as intermediaries between the CPU/GPUs and the large memory space. These intermediaries coordinate access to memory regions that exceed single aperture windows, enabling efficient handling of large memory chunks without requiring the entire space to fit in one window.
4Productivity
If multiple GPUs transfer data over the system bus, then data transfer capability is improved, but the limited PCI Express bus aperture restricts memory-to-memory transfers
Solution Approach 1:
The system segments the bus aperture into multiple virtual windows, one for each stream. This allows multiple GPUs to simultaneously utilize the same physical bus aperture through different virtual windows, effectively multiplying the usable aperture space and enabling more efficient memory-to-memory transfers across multiple GPUs.
Solution Approach 2:
The patent makes the bus aperture universal by allowing it to serve multiple purposes simultaneously through different streams. The same physical aperture can be used for multiple memory regions and multiple GPU pairs at the same time, increasing the overall data transfer capability without requiring additional physical bus resources.
Data Source
AI summary
A hardware-based aperture compression system permits addressing large memory spaces via a limited bus aperture. Streams are assigned dynamic base addresses (BAR) that are maintained in registers on sources and destinations. Requests for addresses lying between BAR and BAR plus the size of the bus aperture are sent with BAR subtracted off by the source and added back by the destination. Requests for addresses outside that range are handled by transmitting a new, adjusted BAR before sending the address request.