Aperture Mappings Extend Processor Storage Address Space
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Processors face limitations in accessing storage media due to their fixed physical address space, which restricts the range of addresses they can directly address, leading to inefficiencies when dealing with storage media having a larger address space, particularly in scenarios requiring dynamic translation between physical and extended memory addresses.
Innovation Solution
The implementation of aperture mappings between the processor's physical address space and the storage medium's address space, allowing for the use of book and booklet apertures of different sizes to extend the accessible storage range, with a controller managing these mappings through book and booklet mapping tables to facilitate access beyond the processor's physical address limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a processor uses a fixed physical address space, then the processor structure remains simple and manageable, but the processor cannot access storage media with larger address spaces
Solution Approach 1:
The patent introduces aperture mappings as an intermediary mechanism between the processor's physical address space and the storage medium's address space. The controller manages book mapping tables and booklet mapping tables that translate processor addresses to storage medium addresses, enabling the processor to access storage media larger than its native address space without modifying the processor architecture.
Solution Approach 2:
The patent segments the address space mapping into multiple hierarchical levels: book apertures of a first size and booklet apertures of a second size. This segmentation allows the system to manage large storage spaces by dividing them into smaller, more manageable aperture segments that can be individually mapped and controlled through separate mapping tables.
2Adaptability or versatility
If aperture mappings are implemented to extend accessible storage range, then the processor can access larger storage media, but the mapping management complexity increases
Solution Approach 1:
The patent implements dynamic aperture mapping where the controller can dynamically allocate and manage book and booklet apertures based on access patterns. The mapping tables can be dynamically updated to remap apertures to different storage regions, providing adaptability while managing complexity through centralized controller logic that handles mapping decisions.
Solution Approach 2:
The aperture mapping mechanism serves multiple functions: it extends the addressable storage space, enables flexible memory management, supports random access to data located anywhere in the extended space, and provides a unified interface for the processor regardless of the underlying storage organization. This multi-functionality justifies the added complexity by delivering diverse benefits from a single mechanism.
3Volume of moving object
If dynamic translation between physical and extended memory addresses is used, then access to extended storage is enabled, but the translation overhead increases access time
Solution Approach 1:
The system performs preliminary actions by pre-establishing aperture mappings in the mapping tables before actual data access occurs. The controller pre-configures book and booklet apertures to map to specific storage regions, so that when the processor needs to access data, the translation can be performed quickly using the pre-computed mapping relationships rather than calculating translations on-demand.
Solution Approach 2:
The patent creates a virtual copy of the address space through aperture mappings, where the mapping tables store translated address relationships. Instead of performing complex real-time translations, the system uses the mapping tables as a lookup copy that provides direct address translation, significantly reducing the time overhead for accessing extended storage locations.
Data Source
Figure 1
Figure 2
Figure 3~4
AI summary
Apertures of a first size in a first physical address space of at least one processor are mapped to respective blocks of the first size in a second address space of a storage medium. Apertures of a second size in the first physical address space are mapped to respective blocks of the second size in the second address space, the second size being different from the first size.