Aperture Wall Electronic Package Footprint Reduction
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Solution Overview
Problem
Existing electronic packages face challenges in reducing footprint size while maintaining reliability and lowering fabrication costs, as they often require large footprints and inefficient fabrication processes.
Innovation Solution
The design incorporates a frame and printed circuit board configuration with aperture walls and fills that reduce package footprint and fabrication time, utilizing high-speed PCB processes and modern materials like bismaleimide-triazine resin laminates, with aperture and board fills to enclose components and provide input/output access, facilitating the use of high-speed PCB fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional package configurations are used, then reliability is maintained, but package footprint area is excessive
Solution Approach 1:
The patent transitions from conventional two-dimensional package layouts to a three-dimensional structure by adding aperture walls that extend vertically from the printed circuit board. This vertical dimension allows components to be enclosed and stacked more efficiently, reducing the horizontal footprint while maintaining component accessibility and signal integrity for reliable operation.
Solution Approach 2:
The patent implements nesting by placing electronic components within apertures formed by the aperture walls, which are themselves integrated with the printed circuit board structure. This nested arrangement allows the package to occupy less external space while maintaining all necessary functional elements, achieving compact footprint without compromising reliability.
2Productivity
If conventional fabrication processes are used, then package reliability is ensured, but fabrication time and cost are excessive
Solution Approach 1:
The patent merges the frame structure, aperture walls, and printed circuit board into a single integrated assembly that can be fabricated as one unit using high-speed PCB processes. This consolidation eliminates multiple separate fabrication and assembly steps, dramatically reducing fabrication time and cost while maintaining the structural integrity and reliability of the package through modern automated manufacturing techniques.
Solution Approach 2:
The patent employs modern materials such as bismaleimide-triazine resin laminates and advanced fabrication parameters enabled by high-speed PCB processes. These parameter changes in material selection and manufacturing capabilities allow for faster production cycles and reduced costs while ensuring the package meets reliability requirements through controlled impedance and precise component placement.
3Area of stationary object
If package footprint is reduced, then component density increases, but fabrication complexity increases
Solution Approach 1:
The patent segments the package structure into modular components including the printed circuit board, aperture walls, and component mounting areas within defined apertures. This segmentation allows each element to be designed and fabricated independently using standardized high-speed PCB processes, reducing overall fabrication complexity despite the compact footprint. The modular approach enables parallel processing and assembly, maintaining simplicity while achieving high component density.
Data Source
AI summary
Electronics packages are provided with structure that provides a significantly-reduced package footprint and also facilitates substantial reduction of package fabrication time and cost. The footprint reduction is realized with a frame that defines an aperture wall which surrounds first sets of components on the first side of a printed circuit board and also extends away from the printed circuit board to provide package input/output access along the perimeter of the package footprint. The second side of the printed circuit board receives a second set of components and this set is protected by a board fill. The frame and printed circuit board are configured for realization from frame and board panels whose planar forms substantially reduce package fabrication time and cost because they facilitate the use of modern high-speed printed circuit board (PCB) fabrication processes.


