API Memory Pool Allocation for Parallel Processor Workloads

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Solution Overview

Problem

The complexity of memory management in parallel computing environments, particularly when different processors interact, often leads to inefficiencies and performance issues due to improper allocation or under-allocation of memory resources.

Innovation Solution

The implementation of application programming interfaces (APIs) that facilitate memory reservation, allocation, and management for parallel processing units (PPUs) such as GPUs, including stream ordered memory allocators to manage memory in a logical grouping and ensure efficient use across multiple software programs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory is over-allocated to ensure sufficient resources for parallel processing operations, then reliability of memory availability is improved, but device complexity and resource waste increase

Engineering Contradiction:
Improvememory availabilityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces memory pools as intermediary structures between the memory hierarchy and parallel processing units. These pools act as mediators that manage memory allocation systematically, tracking which memory regions are allocated to which PPUs and their respective streams. This intermediary layer resolves the contradiction by providing structured oversight that ensures reliable memory availability while maintaining manageable complexity through centralized control mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments memory into distinct pools that are logically grouped and assigned to specific parallel processing units or streams. This segmentation allows independent management of memory regions, enabling precise tracking of allocation status and facilitating efficient reuse of freed memory within the same pool. The segmentation approach improves reliability by ensuring dedicated memory resources while reducing overall complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If memory is under-allocated to reduce resource waste, then device complexity is reduced, but productivity of parallel processing operations deteriorates

Engineering Contradiction:
Improvememory management complexityVSAvoidparallel processing performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements preliminary action by pre-allocating memory pools and establishing allocation rules before parallel processing operations begin. Memory pools are created and configured in advance with defined capacities and assignment criteria. This preliminary setup enables rapid memory allocation during execution without complex runtime decisions, thereby maintaining low device complexity while ensuring sufficient memory resources are available to sustain high productivity throughout the processing operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by dynamically adjusting memory pool characteristics such as allocation size, assignment priorities, and reuse policies based on observed workload patterns. These parameter adjustments allow the system to optimize memory utilization for different parallel processing scenarios, ensuring adequate resources for high productivity while maintaining manageable complexity through adaptive rather than static management approaches.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If memory allocation is optimized for specific software programs, then productivity of those programs is improved, but adaptability to different programming models deteriorates

Engineering Contradiction:
Improvesoftware program performanceVSAvoidprogramming model flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements universality by designing memory pools with multi-functional capabilities that can serve different programming models and software programs through a unified interface. The same memory pool infrastructure supports various parallel processing paradigms, allocation strategies, and program types without requiring separate specialized memory systems. This universal approach maintains adaptability to different programming models while achieving optimized productivity through consistent, efficient memory management principles applied across all workloads.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Ease of operation

If memory management is simplified to reduce device complexity, then ease of operation is improved, but loss of information about memory allocation status increases

Engineering Contradiction:
Improvememory management easeVSAvoidmemory allocation tracking
Core Design Contradiction:
Ease of operationVSLoss of information

Solution Approach 1:

The patent incorporates feedback mechanisms within the memory pool system that continuously monitor and report allocation status, usage patterns, and availability information. This feedback is collected systematically from individual memory regions and aggregated at the pool level, providing comprehensive visibility into memory state without requiring complex manual tracking. The feedback loop enables automated decision-making for allocation and reuse while maintaining simplified operation through centralized information management that prevents data loss about allocation status.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12474981B2Application programming interface to identify memory
Publication Date: 2025.11.18 NVIDIA CORP
  • US12474981B2 patent drawing
  • US12474981B2 patent drawing
  • US12474981B2 patent drawing

AI summary

Apparatuses, systems, and techniques to execute one or more application programming interface (API) functions to facilitate parallel computing. In at least one embodiment, one or more APIs are to indicate one or more storage locations using various novel techniques described herein.