Application Circuit Trace Receiver for High Throughput Debugging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current systems for debugging and verifying complex electronic devices with multiple application computer circuits face challenges in maximizing performance, minimizing power consumption, and increasing trace data throughput, often requiring external components that can limit bandwidth and memory availability.
Innovation Solution
A system where one or more application computer circuits can function as a trace receiver to collect and process trace information within the existing system, using high-speed data interfaces and integrated memory to record trace data without interfering with normal operations, eliminating the need for external trace receivers and memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If external trace receivers and memory are used to debug application computer circuits, then trace data can be collected, but bandwidth is limited by transmission interface and memory availability is restricted
Solution Approach 1:
The patent merges the trace receiver functionality into the system's existing application computer circuits and memory structures. Instead of using external trace receivers, the system utilizes internal application computer circuits to receive and process trace data, and internal memory to store trace information. This eliminates the need for external transmission interfaces, thereby removing bandwidth limitations and maximizing trace data throughput.
Solution Approach 2:
The patent makes application computer circuits multi-functional by enabling them to serve both as application processors and as trace receivers. The same application computer circuits that execute user applications can also receive, process, and store trace data from other application circuits. This universal usage eliminates dedicated external trace hardware and maximizes the utilization of existing system resources for trace debugging.
2Quantity of substance
If system memory is used to store trace information, then trace memory is available, but the size of trace memory is limited and restricts memory available for applications
Solution Approach 1:
The patent implements dynamic memory allocation where memory regions can be flexibly assigned between application use and trace data storage based on current system needs. The memory management system can dynamically allocate portions of system memory to trace buffering when trace debugging is active, and release these regions back to application use when trace debugging is inactive. This dynamic approach maximizes both trace memory size during debugging and memory availability for applications during normal operation.
Solution Approach 2:
The patent enables the system to temporarily discard application memory usage during trace debugging operations by allocating memory regions for trace data storage, and then recover this memory for application use once debugging is complete. The circular buffer implementation allows continuous trace data storage while efficiently managing memory resources, releasing trace memory regions back to the application memory pool when no longer needed for trace buffering.
3Loss of information
If trace information is transferred to and from memory, then trace data can be accessed, but application memory transfers are restricted
Solution Approach 1:
The patent segments memory access operations into separate trace-related and application-related pathways. The trace receiver circuitry has dedicated access to memory regions allocated for trace buffering, allowing trace data transfers to occur independently from application memory transfers. This segmentation enables simultaneous trace data collection and application execution without one restricting the other, as each operates in its own memory access lane.
Solution Approach 2:
The patent introduces an intermediary trace receiver circuit that acts as a buffer between application computer circuits and memory. This intermediary receives trace data from application circuits and stores it in dedicated trace buffer regions, preventing direct contention between trace transfers and application memory transfers. The intermediary manages memory access arbitration, allowing trace and application memory operations to proceed with minimal interference to each other's productivity.
Data Source
AI summary
A system having a plurality of application computer circuits is disclosed. A first application computer circuit is arranged to process a first application. A trace collection circuit collects trace information from the first application computer circuit. A second application computer circuit is arranged to receive and store the collected trace information in a first mode and to process a second application in a second mode.