Approximate Cache Control With Mapping Validity Feedback

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Solution Overview

Problem

Approximate caching reduces query response time but introduces errors due to the lack of proper error control in mapping input queries to output values.

Innovation Solution

A controller for a cache that stores input queries as approximate inputs with associated state information to monitor the validity of mappings, reducing errors by verifying and correcting mappings when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If approximate caching is used to reduce query response time, then query response time is improved, but mapping errors are introduced

Engineering Contradiction:
Improvequery response timeVSAvoidmapping accuracy
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The system implements feedback mechanisms through query counters and validation flags that track the accuracy of approximate cache mappings. When the query counter reaches a threshold or validation fails, the system retrieves the correct output from the computation unit to verify and update the cache entry, ensuring mapping accuracy while maintaining fast cache retrieval for valid entries

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary validation by setting validation flags and establishing query thresholds before cache entries are fully trusted. This preliminary action prevents erroneous mappings from propagating errors while still allowing the cache to function quickly for validated entries

Inventive Principle:
Principle #10Preliminary action

2Reliability

If state information is added to monitor mapping validity, then mapping accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvemapping accuracyVSAvoidcache structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The state information structures serve multiple functions: query counters both limit cache usage and validate mapping accuracy, while validation flags both track errors and control retrieval behavior. This multi-functionality reduces the need for separate monitoring mechanisms, thereby limiting complexity increase while improving reliability

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If cache entries are validated and corrected, then mapping accuracy is improved, but query processing time increases

Engineering Contradiction:
Improvemapping accuracyVSAvoidquery processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system applies validation and correction only partially - only when query counters reach thresholds or validation flags indicate potential errors. For the majority of cache hits with valid state information, the system retrieves results immediately without full validation, thus maintaining fast query processing while still improving mapping accuracy for uncertain entries

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP4107613B1Controller for a cache and method for controlling a cache
Publication Date: 2026.03.25 HUAWEI TECH CO LTD
  • EP4107613B1 patent drawingFigure 1(a)~1(b)
  • EP4107613B1 patent drawingFigure 2
  • EP4107613B1 patent drawingFigure 3(a)~3(b)

AI summary

The present invention relates to a controller (1) for a cache (2). The cache (2) is configured to store one or more outputs of a computation unit (3). The controller (1) is configured to map input queries to one or more approximate inputs. For each of the one or more approximate inputs, the controller (1) is configured to store, in the cache (2), the approximate input (h) in association with a respective output (y) of the one or more outputs and a respective state information (SI) as a cache entry (2a). The respective state information (SI) comprises information for monitoring validity of a mapping of the approximate input (h) to the respective output (y) of the cache entry (2a). Moreover, the present invention relates to a system comprising such a controller and a cache as well as to a method for controlling a cache.