Approximate DCIM Macro Design for Neural Network Cost-Accuracy Tradeoffs
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Solution Overview
Problem
Conventional computer architectures for artificial neural networks are inefficient due to high computation and data movement requirements, leading to increased hardware costs and a trade-off between energy, area, and accuracy, especially in memory cell arrays.
Innovation Solution
A computing-in-memory design system using an artificial neural network that employs an evolutionary algorithm for approximate addition and a genetic algorithm for channel-specific weight mapping, optimizing the DCIM macro structure to balance hardware cost and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional computer architectures are used for artificial neural networks, then computation and data movement requirements are met, but hardware costs and energy consumption increase significantly
Solution Approach 1:
The patent merges computation and memory functions into a single Computing-In-Memory (CIM) macro structure. The DCIM macro integrates memory cells with computation circuits, allowing multiply-accumulate operations to be performed directly within the memory array, eliminating the need for separate computation units and reducing data movement between memory and processor.
Solution Approach 2:
The patent introduces approximate addition circuits as intermediary components within the DCIM macro. These circuits perform approximate computations on quantized data, providing a middle ground between exact computation (high accuracy, high energy) and no computation (low energy, low accuracy), thereby reducing energy consumption while maintaining acceptable computational reliability.
2Reliability
If adder tree is added to memory for computational functions, then computation capability is improved, but hardware area and cost increase
Solution Approach 1:
The patent segments the computation function into distributed approximate addition circuits located at each memory block or column within the DCIM macro. Instead of using a centralized adder tree that would require large area, the computation is divided and performed locally at multiple points in the memory array, reducing the overall area required for computation while maintaining computation capability.
Solution Approach 2:
The patent uses approximate addition circuits that sacrifice some computational accuracy for significant area reduction. These approximate circuits are simpler and occupy less area than exact adder trees, providing a cost-effective solution that trades off a small amount of computation quality for large area savings in the memory structure.
3Use of energy by moving object
If approximation based digital computing-in-memory is used, then energy and area are reduced, but accuracy deteriorates
Solution Approach 1:
The patent applies different approximation levels to different parts of the neural network computation. Channel-specific weight mapping assigns different approximate addition configurations to different channels or neurons based on their importance or sensitivity to quantization error. This allows critical computations to maintain higher accuracy while less critical ones use more aggressive approximation, balancing overall accuracy with energy reduction.
Solution Approach 2:
The patent introduces dynamic approximation where the level of approximation can be adjusted based on operational requirements. The system can switch between different approximation modes or adjust the precision of approximate addition circuits dynamically, allowing it to maintain high accuracy when needed while consuming less energy during normal operation, thus making the accuracy-energy trade-off flexible rather than fixed.
4Productivity
If DCIM macro structure is optimized for neural network operations, then computational efficiency is improved, but design complexity increases
Solution Approach 1:
The patent designs a universal DCIM macro structure that can perform multiple neural network operations including multiply-accumulate, approximate addition, and channel-specific weight mapping. This multi-functional design allows the same hardware structure to handle different types of neural network computations, reducing the need for specialized circuits for each operation and thereby managing design complexity while maintaining computational efficiency.
Data Source
AI summary
Disclosed is a method of operating a computing system. The method performed in the computing system having one or more processors and a memory storing one or more programs executed by the one or more processors, includes receiving one of a plurality of artificial neural network architectures as a backbone architecture, determining a structure of a DCIM (Digital Computing-in-Memory) macro based on the backbone architecture, generating an approximate addition candidate group of the DCIM macro based on a first algorithm, generating a heterogeneous approximate DCIM based on the structure of the DCIM macro and the approximate addition candidate group, and mapping channel-specific weights with respect to the heterogeneous approximate DCIM based on a second algorithm.