Approximate NoC Communication Using Error-Tolerant Data Compression
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Solution Overview
Problem
Conventional network-on-chip (NoC) designs in parallel computing systems face bottlenecks in power consumption and latency due to transmitting data with absolute accuracy, which is unnecessary for error-tolerant applications like pattern recognition and scientific computing, leading to inefficiencies in network performance.
Innovation Solution
An approximate communication framework that identifies error-resilient variables and calculates their error tolerance, using hardware-software co-design to compress data packets, reducing power consumption and latency while ensuring result quality through hardware augmentation with approximate data compression and decompression modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If data is transmitted with absolute accuracy in conventional NoC designs, then measurement precision is improved, but use of energy and loss of time worsen
Solution Approach 1:
The patent changes the precision parameter of data transmission by introducing approximate computation modes. Instead of transmitting all data with full precision, the system selectively transmits data with reduced precision based on error tolerance analysis, thereby reducing power consumption while maintaining acceptable accuracy for approximate computing applications.
Solution Approach 2:
The patent applies partial action by transmitting only the necessary precision level required for each data element. Through static and dynamic error tolerance analysis, the system determines the minimum required precision for different variables and transmits data at that level rather than using full precision for all data, reducing energy consumption without compromising result quality.
2Measurement precision
If data is transmitted with absolute accuracy in conventional NoC designs, then measurement precision is improved, but loss of time worsens
Solution Approach 1:
The patent changes the precision parameter of data transmission by introducing approximate computation modes. Instead of transmitting all data with full precision, the system selectively transmits data with reduced precision based on error tolerance analysis, thereby reducing network latency while maintaining acceptable accuracy for approximate computing applications.
Solution Approach 2:
The patent applies partial action by transmitting only the necessary precision level required for each data element. Through static and dynamic error tolerance analysis, the system determines the minimum required precision for different variables and transmits data at that level rather than using full precision for all data, reducing transmission time and network latency.
3Use of energy by moving object
If data packet size is reduced through approximation, then use of energy and loss of time improve, but measurement precision worsens
Solution Approach 1:
The patent systematically changes the precision parameter based on error tolerance requirements. The system performs error tolerance analysis to determine the appropriate precision level for each variable, then transmits data at that optimized precision level, achieving energy reduction without unacceptable loss of accuracy.
Solution Approach 2:
The patent applies local quality by treating different data elements differently based on their individual error tolerance characteristics. Instead of uniformly reducing precision for all data, the system identifies which variables can tolerate approximation and applies approximation selectively to those variables, maintaining high precision for critical data while reducing precision for tolerant data.
4Measurement precision
If conventional NoC designs transmit all data with full precision, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent introduces a precision control mechanism that dynamically or statically adjusts the precision parameter for different data transmissions. This requires enhanced network interface capabilities to handle variable precision levels, including error tolerance analysis and selective approximation, which increases device complexity but enables significant energy and time savings.
Data Source
AI summary
Systems and methods are disclosed for reducing latency and power consumption of on-chip movement through an approximate communication framework for network-on-chips (“NoCs”). The technology leverages the fact that big data applications (e.g., recognition, mining, and synthesis) can tolerate modest error and transfers data with the necessary accuracy, thereby improving the energy-efficiency and performance of multi-core processors.


