AR Glasses μLED Wafer Reconstitution for 300 mm Integration
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Solution Overview
Problem
The integration of micro-LEDs with digital and analog circuitry is hindered by the mismatch in wafer diameters, leading to waste, increased cost, and complexity due to the need for accommodating different-sized wafers in semiconductor fabrication processes.
Innovation Solution
A wafer reconstitution process that involves singulating dice from smaller diameter wafers with inorganic semiconductor layers, bonding them to larger diameter wafers, and forming μLED arrays to enable seamless processing using 300 mm production lines, thereby integrating μLEDs with digital/analog circuitry efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If smaller diameter wafers are used for μLED fabrication, then manufacturing precision and quality can be maintained, but device complexity and processing cost increase due to wafer size mismatch
Solution Approach 1:
The patent divides the integration process into separate stages: first fabricating μLEDs on smaller wafers (100mm or 200mm) where precision can be maintained, then singulating these into individual dice, and finally bonding them to larger 300mm wafers containing driver circuitry. This segmentation allows each stage to be optimized independently for its specific requirements.
Solution Approach 2:
The patent introduces an intermediary process of wafer reconstitution, where dice from smaller wafers are temporarily mounted on carrier wafers and then bonded to the final 300mm wafer. This intermediary step acts as a bridge between the incompatible wafer sizes, enabling integration without requiring direct compatibility between the μLED fabrication wafer and the driver circuitry wafer.
2Productivity
If wafer reconstitution is implemented to integrate μLEDs with driver circuitry, then productivity and cost efficiency improve, but device complexity increases during the integration process
Solution Approach 1:
The patent performs preliminary actions by pre-fabricating μLEDs on smaller wafers, singulating them into dice, and preparing carrier wafers before the final integration step. This allows the complex tasks to be broken down and performed in advance under optimized conditions, rather than attempting to perform all operations simultaneously on incompatible wafer sizes.
Solution Approach 2:
The patent employs a nested structure where multiple layers are integrated vertically: the μLED dice are bonded onto the driver circuitry wafer, creating a stacked three-dimensional integration. This nested arrangement allows efficient use of the 300mm wafer real estate while incorporating the previously fabricated smaller-wafer μLEDs into the final assembly.
3Adaptability or versatility
If different substrate materials are used for driver circuitry and light emission devices, then adaptability and functional performance improve, but manufacturing precision deteriorates due to material incompatibility
Solution Approach 1:
The patent extracts the μLEDs from their original substrate and inorganic semiconductor layer, singulating them into individual dice that can be independently handled and bonded. This extraction allows the light emission devices to be separated from their fabrication substrate, enabling independent optimization of the substrate material for driver circuitry without compromising the μLED performance.
Data Source
AI summary
Systems and devices describe an augmented-reality glasses having a plurality of panels of light emitters arranged to form an array of light emitters, collimation optics for collimating light received from the array of light emitters, an optical coupler for receiving the collimated light, and a waveguide for display of augmented-reality content to a wearer of the augmented-reality glasses. In some embodiments, the array of light emitters includes light emitters generating three colors, each panel of the plurality of panels of light emitters having light emitters generating a same color, and each panel of the plurality of panels of light emitters positioned on a surface of a semiconductor with at least one integrated circuit. The array of light emitters can be two-dimensional array of light emitters arranged on a common plane and characterized by a pitch that is less than 2 μm.