Arbitration Circuitry for Shared Instruction Execution
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Solution Overview
Problem
In data processing systems with a shared apparatus, CPUs can experience halted forward progress when needing information from the shared apparatus, particularly during context switches, due to the apparatus being engaged elsewhere.
Innovation Solution
A data processing apparatus with receiver circuitry, processing circuitry, and arbitration circuitry that prioritizes and executes instructions from a subset of requester devices, allowing predetermined types of instructions, such as context accessing or control instructions, to be executed immediately, even if the requester device has not been selected, thereby preventing delays during context switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a shared data processing apparatus is provided to multiple CPUs to improve spatial efficiency, then device complexity and space utilization are improved, but CPU forward progress halts when the shared apparatus is engaged elsewhere
Solution Approach 1:
The patent applies preliminary action by having the shared apparatus execute context-switching-related instructions immediately when received, before the requesting CPU completes its normal instruction execution cycle. This preliminary execution of context-switch instructions ensures that the CPU can maintain forward progress by preparing context switches in advance, resolving the contradiction between shared resource efficiency and CPU operational reliability.
2Device complexity
If the shared data processing apparatus executes instructions from a subset of requester devices at a time, then device complexity is reduced, but execution time for critical instructions increases
Solution Approach 1:
The patent applies local quality by differentiating the treatment of instructions based on their type. Context-switching-related instructions (predetermined type) receive immediate execution priority, while other instructions follow the normal subset selection process. This localized prioritization ensures that critical instructions execute without delay, maintaining system reliability without compromising the overall time efficiency of the shared apparatus.
3Reliability
If context switching instructions are executed immediately regardless of subset selection, then CPU forward progress is maintained, but processing circuitry workload increases
Solution Approach 1:
The patent applies feedback by implementing a mechanism where the shared apparatus monitors the type of instructions received and dynamically adjusts its execution strategy. When context-switching instructions are detected, the apparatus immediately executes them, then resumes normal subset-based scheduling. This feedback-driven approach ensures that critical instructions are prioritized without continuously overloading the processing circuitry, as normal instructions continue to be processed through efficient subset selection.
Data Source
AI summary
A data processing apparatus comprises receiver circuitry for receiving instructions from each of a plurality of requester devices. Processing circuitry executes the instructions associated with each of a subset of the requester devices at a time and arbitration circuitry determines the subset of the requester devices and causes the instructions associated with each of the subset of the requester devices to be executed next. In response to the receiver circuitry receiving an instruction of a predetermined type from one of the requester devices outside the subset of requester devices, the arbitration circuitry causes the instruction of the predetermined type to be executed next.