Arbitration Devices for Synchronizing Dissimilar Processor Event Data
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Solution Overview
Problem
In high-integrity avionics systems like fly-by-wire, synchronizing data access across multiple dissimilar processors leads to decreased performance due to waiting times and improper data transfer, as faster processors wait for slower ones to access data, and using multiple processors in a lane can result in incorrect data ordering.
Innovation Solution
Implementing arbitration devices that receive and synchronize event data across multiple lanes of computation, ensuring simultaneous access and output of data, allowing processors to access synchronized event data without order dependency and reducing waiting times through mechanisms like Direct Memory Access (DMA) and First-In-First-Out (FIFO) for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transaction-wire basis synchronization is used for multiple dissimilar processors, then data access synchronization is achieved, but processing performance decreases due to faster lanes waiting for slower lanes
Solution Approach 1:
The system segments the data access path by introducing separate arbitration devices for each computation lane. Each lane has its own arbitration device that manages data access independently, eliminating the need for slower lanes to wait for faster lanes. This segmentation allows each processor to access data at its own pace while maintaining synchronization through the arbitration mechanism.
Solution Approach 2:
Arbitration devices serve as intermediary components between the data input and the processors. These intermediaries receive data from the data input and distribute it to the appropriate processors, managing the timing and ordering of data access. The arbitration devices ensure that data is made available to processors in a synchronized manner without requiring processors to wait for each other.
2Productivity
If multiple processors are used in a lane of computation, then processing capability increases, but improper data transfer occurs due to different access ordering
Solution Approach 1:
The arbitration device implements feedback mechanisms to track which processors have accessed data and in what order. This feedback information is used to control subsequent data transfers, ensuring that processors receive data in the correct sequence. The arbitration device monitors the state of each processor and adjusts data delivery accordingly, preventing improper data transfer even when multiple processors are present in a lane.
Data Source
AI summary
A system includes a first plurality of processors, a second plurality of processors dissimilar from the first plurality of processors, a first arbitration device coupled to the first plurality of processors, and a second arbitration device coupled to the second plurality of processors. The first arbitration device and the second arbitration device is configured to receive event data, store the received event data, and to output the received event data at substantially a same time. At least one processor of the first plurality of processors and at least one processor of the second plurality of processors are configured to access the event data.