Arc Fault Detector Built-In Test Using Pseudo-Random Current Injection
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Solution Overview
Problem
Traditional arc fault detection systems are difficult to test effectively while operating and may miss true arc fault events due to overdriving during conventional testing methods.
Innovation Solution
An arc fault detection system with a built-in-test that includes a radio-frequency stimulator switch and a processing unit, which generates a pseudo-random sequence of bits to simulate a test current and measure the system's response without interfering with fault detection, allowing for real-time testing without additional circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the arc fault detection system is tested while operating with load, then real-time testing is achieved, but the test may interfere with fault detection
Solution Approach 1:
The patent applies local quality by making the test current injection localized and targeted at specific test current input terminals, distinct from the normal operational current paths. This localized approach allows testing to occur without interfering with the broader fault detection function
Solution Approach 2:
The test current is applied at a partial level that is sufficient to verify system response but deliberately kept below the threshold that would trigger arc fault detection, allowing simultaneous operation and testing without interference
2Ease of operation
If additional circuitry is added to enable built-in testing, then testing capability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the test current injection circuitry to share common components with the operational circuitry. The same current sense leads and signal paths are used for both normal operation and testing, eliminating the need for completely separate test circuits
Solution Approach 2:
The built-in test function is merged with the operational system by using the same current sense leads and signal processing paths for both testing and normal arc fault detection, reducing overall circuitry complexity while maintaining full testing capability
Data Source
AI summary
An arc fault detection system with a built-in-test includes an arc fault detector having a load noise voltage input, a test current input and an arc fault detector output. The system includes a processing unit having a switch in electrical communication with the test current input and an input in electrical communication with the arc fault detector output. A method for testing an arc fault detection system includes generating a new bit with a processing unit and outputting the new bit to a switch operatively connected to the processing unit to at least one of turn the switch on or turn the switch off. The method includes reading a signal at an input of the processing unit.


