Automatic generation of processing architecture-specific algorithms
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Solution Overview
Problem
The manual process of creating software code optimized for specific hardware architectures is time-consuming and error-prone, and existing methods often fail to fully utilize the hardware and software capabilities of diverse processing architectures.
Innovation Solution
A method and system for automatically generating architecture-specific algorithms using architecture-specific building blocks, which involves receiving an architecture-independent algorithm, determining its functionality, selecting dynamically reconfigurable computing blocks, testing the emulated algorithm for compliance, and generating architecture-specific code segments that execute efficiently on the target processing architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual code creation is used for architecture-specific optimization, then algorithm performance can be optimized for target hardware, but development time increases and errors are introduced
Solution Approach 1:
The system creates architecture-specific code by copying and transforming a template architecture-independent algorithm into target architecture-specific implementations. The algorithm analyzer extracts functionality and the code generator automatically produces optimized code for specific architectures (CPU, GPU, FPGA) based on the template, eliminating manual rewriting while maintaining optimization benefits.
Solution Approach 2:
The manual mechanical process of writing architecture-specific code is replaced with an automated computer-based system consisting of an algorithm analyzer that determines functionality and a code generator that automatically produces architecture-specific implementations, substituting human manual coding with automated computational processes.
2Productivity
If generic algorithms are used across multiple architectures, then development efficiency improves, but hardware-specific optimizations are lost
Solution Approach 1:
The system creates a universal architecture-independent algorithm template that can be applied across multiple different processing architectures (CPU, GPU, FPGA). The same template serves multiple functions by being automatically adapted to different target architectures through the code generator, which selects appropriate architecture-specific building blocks while maintaining the original algorithm's functionality.
Solution Approach 2:
The system transforms the algorithm implementation by changing parameters such as data types, operation instructions, and memory access patterns to match the specific target architecture. The code generator modifies the generic algorithm parameters to produce architecture-optimized code while preserving the core algorithmic logic, enabling full utilization of hardware-specific capabilities.
3Reliability
If architecture-specific building blocks are used, then performance optimization is maximized, but system complexity increases
Solution Approach 1:
The system segments the algorithm into functional components analyzed by the algorithm analyzer, then maps these segments to corresponding architecture-specific building blocks. This segmentation allows the complex code generation process to be broken down into manageable steps: analyzing functionality, selecting building blocks, and generating code, reducing the perceived complexity through systematic decomposition.
Solution Approach 2:
The system introduces an intermediary layer of architecture-specific building blocks that mediate between the architecture-independent algorithm template and the target hardware architecture. These building blocks serve as translators that bridge the gap between generic algorithm logic and hardware-specific implementations, simplifying the overall system architecture while enabling optimization.
Data Source
AI summary
A method of generating automatically architecture-specific algorithms, comprising receiving an architecture independent algorithm and one or more algorithm parameters defining at least a target processing architecture and a format of an output of an architecture-specific algorithm implementing the received algorithm, determining automatically a functionality of the algorithm by analyzing the algorithm, selecting one or more architecture-specific computing blocks of the target processing architecture according to the functionality of the algorithm and the algorithm parameter(s) wherein each computing block is dynamically reconfigurable in runtime and associated with (1) simulation code simulating its functionality, and (2) execution code executing its functionality, testing an emulated architecture-specific algorithm constructed using the simulation code of the selected architecture-specific computing block(s) to verify compliance with the algorithm parameter(s), and, responsive to successful compliance verification, generating automatically an architecture-specific code segment implementing the architecture-specific algorithm based on the execution code of the selected architecture-specific computing blocks.