Area-Bounded Tracks With Spacetiles For Routing Flexibility

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Solution Overview

Problem

Conventional track pattern representation in electronic design does not support region-based track patterns, non-uniform pitches, and area-specific constraints, making it challenging for advanced manufacturing requirements, especially for interactive layout editing and routing tasks.

Innovation Solution

Implementing area-bounded tracks with spacetiles and area-based search probes to associate track patterns with specific regions, allowing for flexible and constrained routing solutions, including the use of spacetile punch processes to generate multiple spacetiles for viable implementation options.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional track pattern representation is used, then the design process is simpler, but it does not support region-based track patterns, non-uniform pitches, and area-specific constraints

Engineering Contradiction:
Improvesupport for region-based track patterns and area-specific constraintsVSAvoidtrack pattern representation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the design space into distinct regions, each with its own track pattern characteristics. Track patterns are segmented by region boundaries, allowing different pitch values, orientations, and constraints to be applied to different areas of the same layer without affecting the entire design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables local customization of track patterns by associating specific track definitions with particular regions. Each region can have unique track pitch, orientation, and spacing characteristics tailored to local routing requirements, while maintaining consistency within each region.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If area-bounded tracks with spacetiles are implemented, then routing flexibility and compliance with complex grid requirements are improved, but the device complexity increases

Engineering Contradiction:
Improverouting flexibility and grid complianceVSAvoidimplementation complexity with spacetiles
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary generation of spacetiles based on track pattern definitions and region boundaries before the actual routing process. This pre-computation creates a structured framework that guides subsequent routing operations, reducing the complexity of real-time routing decisions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces spacetiles as an intermediary data structure that mediates between the high-level track pattern definitions and the detailed routing operations. Spacetiles serve as a intermediate representation that simplifies the interaction between routing algorithms and complex track constraints.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If track patterns are bounded within designated areas, then manufacturing precision is improved, but the ease of operation decreases

Engineering Contradiction:
Improvetrack pattern boundary complianceVSAvoidinteractive layout editing ease
Core Design Contradiction:
Manufacturing precisionVSEase of operation

Solution Approach 1:

The patent provides feedback mechanisms that monitor track pattern placements against region boundaries and constraints. The system automatically detects violations of track bounds and provides guidance to users, ensuring manufacturing precision while maintaining ease of operation through intelligent assistance.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9003349B1Methods, systems, and articles of manufacture for implementing a physical electronic design with area-bounded tracks
Publication Date: 2015.04.07 CADENCE DESIGN SYST INC
  • US9003349B1 patent drawing
  • US9003349B1 patent drawing
  • US9003349B1 patent drawing

AI summary

Disclosed are methods, systems, and articles of manufacture for implementing a physical electronic design with area-bounded tracks. One aspect identifies an area in an electronic design and a track pattern associated with the area, identifies active tracks in the track pattern, and creates spacetiles with the active tracks. This aspect uses area-based search probes based on spacetiles to find viable implementation solutions to implement the area in the electronic design. Another aspect identifies a tracked area associated with a track pattern and a trackless area and use spacetile(s) and a via spacetile layer to transition between the tracked area and the trackless area for implementation of the electronic design in the tracked or the trackless area of the electronic design.