Neural Network Argmax Mapping on Fixed-Function Hardware
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing neural network accelerators (NNAs) face inefficiencies in performing argmax/argmin functions due to limited flexibility, increased resource consumption, and performance degradation when these functions are implemented as dedicated hardware or outsourced to general-purpose processors.
Innovation Solution
Repurpose existing fixed-function circuitry in NNAs, such as convolution engines, element-wise operations units, and pooling units, to perform argmax/argmin functions using a combination of elementary neural network operations like element-wise subtraction, multiplication, maximum, minimum, pooling, and lookup operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dedicated hardware modules are added for argmax/argmin functions, then functionality is improved, but device complexity increases
Solution Approach 1:
The patent makes existing fixed-function circuitry (pooling units, convolution engines, element-wise operation units) perform multiple functions by repurposing them to execute argmax/argmin operations through elementary neural network operations, eliminating the need for dedicated hardware modules
2Device complexity
If argmax/argmin functions are processed off-chip, then device complexity is reduced, but productivity decreases due to data transfer overhead
Solution Approach 1:
The patent combines argmax/argmin function execution with the existing fixed-function circuitry by mapping these operations to elementary neural network operations that can be performed within the same hardware units that execute standard neural network layers, eliminating separate processing steps and data transfers
3Device complexity
If argmax/argmin functions are processed off-chip, then device complexity is reduced, but loss of time increases due to data transfer overhead
Solution Approach 1:
The patent merges argmax/argmin operations with the neural network execution flow by implementing them through elementary operations within the fixed-function circuitry, allowing these functions to be computed in-place during or immediately after the relevant neural network layer execution without separate data transfer cycles
Data Source
AI summary
A mechanism for processing, on a hardware accelerator comprising fixed-function circuitry, data according to a neural network process that comprises a neural network with an associated argmax or argmin function. The argmax or argmin function is mapped to a set of elementary neural network operations available to the fixed-function circuitry. The neural network process is then executed using the fixed-function circuitry. The data processed using the neural network process comprises image and/or audio data.