Reconfigurable Processor Argument Registers With Fast Direct Loading
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Solution Overview
Problem
Existing reconfigurable processors face inefficiencies in updating argument registers during runtime, as replacing the entire configuration file to modify arguments is resource-intensive and inefficient.
Innovation Solution
A data processing system with a host processor and a coarse-grained reconfigurable array (CGR) that uses a program load process for initial configuration and a fast argument load (FAL) process to dynamically update individual argument registers, utilizing a master AGCU to manage configuration and argument data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the entire configuration file is replaced to update argument registers, then the argument registers are updated, but the time and resources required for the update increase significantly
Solution Approach 1:
The configuration file is segmented into distinct components: the static configuration data and the dynamic argument registers. This segmentation allows the argument registers to be updated independently without requiring replacement of the entire configuration file, thereby reducing update time while maintaining configuration integrity.
Solution Approach 2:
The argument registers are extracted from the main configuration file structure and stored separately in dedicated register storage. This extraction enables direct writing to argument registers through a fast argument load interface, eliminating the need to reload the entire configuration file when only arguments need updating.
2Manufacturing precision
If the entire configuration file is replaced to update argument registers, then the argument registers are updated, but the computational resources are wasted
Solution Approach 1:
The configuration system is segmented into persistent configuration storage and transient argument storage. This allows the system to avoid the computational overhead of processing and reloading the entire configuration file when only argument updates are needed, thereby conserving energy and computational resources.
Solution Approach 2:
The reconfigurable processor is equipped with a dedicated fast argument load interface that enables self-service updating of argument registers. This specialized interface allows direct writing of argument values without invoking the full configuration loading machinery, reducing computational overhead and energy consumption.
3Speed
If the configuration file structure is simplified for faster loading, then the loading speed improves, but the flexibility to update individual arguments decreases
Solution Approach 1:
The configuration system is segmented into two distinct access paths: a fast configuration load path for initial loading and a fast argument load path for subsequent argument updates. This segmentation maintains the flexibility to update individual arguments while preserving fast loading capabilities through optimized data structures and dedicated interfaces.
Solution Approach 2:
The configuration data structure is designed with multi-functionality to support both fast initial loading and efficient subsequent argument updates. The separated argument storage and dual access paths enable the system to adapt to different operational requirements, maintaining both speed and flexibility.
Data Source
AI summary
A reconfigurable processor is disclosed, featuring an array of configurable units interconnected by a bus system. Each configurable unit includes a configuration data store structured as a shift register that includes individually addressable argument registers. Program load logic is responsible for receiving sub-files of configuration data through the bus system and sequentially shifting them into the configuration data store, including the argument registers. Argument load logic is designed to receive argument data via the bus system and directly load it into the argument registers without the need for shifting through the shift register.