Arithmetic Circuit Serialization for Lossless Data Footprint Reduction
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Solution Overview
Problem
Current technologies face challenges in efficiently reducing the data footprint of arithmetic circuits, which is crucial for storage in disk or memory, especially in distributed computing environments like blockchain networks.
Innovation Solution
The method involves removing redundant data fields from arithmetic circuits and applying entropy coding schemes to compress the remaining data, resulting in a serialized circuit that can be stored efficiently and later de-serialized losslessly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If arithmetic circuits are stored in their original format, then complete information is preserved, but data footprint is large and storage efficiency is low
Solution Approach 1:
The patent extracts and removes redundant data fields from arithmetic circuits before storage. Specifically, it identifies and eliminates fields that can be derived from other fields (e.g., removing wire identifier fields when cardinality information is available), thereby reducing data footprint while preserving the ability to reconstruct complete circuit information.
Solution Approach 2:
The patent applies entropy coding schemes to transform the representation of arithmetic circuit data. By changing the parameter representation from raw field values to compressed encoded forms, the data footprint is significantly reduced while maintaining lossless reconstructability of the original circuit information.
2Quantity of substance
If compression techniques are applied to reduce data footprint, then storage efficiency improves, but circuit reconstruction complexity increases
Solution Approach 1:
The patent performs preliminary organization and structuring of arithmetic circuit data before compression. By pre-identifying redundant fields and establishing a systematic removal approach, the reconstruction process becomes more straightforward despite the compression applied, as the structure of the compressed data reflects the original circuit hierarchy.
Solution Approach 2:
The patent introduces an intermediary compression layer that uses entropy coding with embedded de-serialization instructions. This intermediary structure acts as a bridge between the compressed form and the original circuit representation, providing guidance for reconstruction and reducing the complexity of recovering the original circuit from compressed data.
3Quantity of substance
If redundant data fields are removed, then data footprint is reduced, but data retrieval difficulty increases
Solution Approach 1:
The patent embeds de-serialization instructions within the compressed data structure that provide feedback during the reconstruction process. These instructions guide the systematic recovery of removed fields from the remaining data and compression metadata, making the retrieval process automated and reducing the difficulty of reconstructing the original circuit information.
4Quantity of substance
If entropy coding is applied to compress arithmetic circuits, then storage requirements decrease, but processing time increases
Solution Approach 1:
The patent applies entropy coding selectively to specific portions of the arithmetic circuit data that exhibit higher redundancy, rather than uniformly compressing all fields. By focusing compression efforts on the most redundant elements (such as repeated wire identifiers or patterned field sequences), the patent achieves significant storage reduction while minimizing the processing overhead associated with compression and decompression operations.
Data Source
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AI summary
Techniques described herein may be utilized to serialise and de-serialise arithmetic circuits that are utilized in the execution of computer programs. The arithmetic circuit may be utilized to build a Quadratic Arithmetic Problem (QAP) that is compiled into a set of cryptographic routines for a client and a prover. The client and prover may utilize a protocol to delegate execution of a program to the prover in a manner that allows the client to efficiently verify the prover correctly executed the program. The arithmetic circuit may comprise a set of symbols (e.g., arithmetic gates and values) that is compressed to produce a serialised circuit comprising a set of codes, wherein the set of symbols is derivable from the set of codes in a lossless manner. Serialisation and de-serialisation techniques may be utilized by nodes of a blockchain network.