Arithmetic Circuit Serialization for Lossless Data Footprint Reduction

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Solution Overview

Problem

Existing technologies face challenges in efficiently reducing the data footprint of arithmetic circuits, which is crucial for storage and transmission in distributed computing environments like blockchain networks.

Innovation Solution

The method involves removing redundant data fields and applying entropy coding schemes to compress arithmetic circuits, allowing for the creation of a serialized circuit that can be stored and transmitted with reduced data requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If arithmetic circuits are stored in full form, then complete information is preserved, but storage space and transmission bandwidth are excessive

Engineering Contradiction:
Improvedata footprintVSAvoidcircuit information completeness
Core Design Contradiction:
Quantity of substanceVSLoss of information

Solution Approach 1:

The patent extracts and removes redundant data fields from arithmetic circuit representations. Specifically, it identifies and eliminates fields that can be derived from other fields (e.g., removing wire identifier fields when the number of wires can be derived from the circuit structure), thereby reducing storage requirements while preserving essential circuit information.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies entropy coding schemes to transform the representation of arithmetic circuit data. By changing the parameter encoding method from fixed-length to variable-length entropy-coded representations, the patent achieves compact storage while maintaining the ability to perfectly reconstruct the original circuit information during decompression.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If data fields are removed to reduce footprint, then storage efficiency improves, but data reconstruction complexity increases

Engineering Contradiction:
Improvestorage requirementsVSAvoiddecompression complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent performs preliminary identification and marking of redundant fields during the compression phase. By pre-determining which fields are redundant and how they should be reconstructed, the patent simplifies the decompression process rather than increasing complexity, as the reconstruction rules are established in advance during circuit analysis.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If entropy coding is applied to compress circuits, then transmission efficiency improves, but processing time increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidcompression and decompression time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs entropy coding analysis and model building in advance during the circuit compression phase. By pre-computing the entropy-coded representation and storing the coding model, the patent enables faster decompression later, as the expensive entropy analysis is performed only once during compression rather than during each decompression operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12314716B2Computer-implemented systems and methods for serialisation of arithmetic circuits
Publication Date: 2025.05.27 NCHAIN LICENSING AG
  • US12314716B2 patent drawing
  • US12314716B2 patent drawing
  • US12314716B2 patent drawing

AI summary

Techniques described herein may be utilized to serialise and de-serialise arithmetic circuits that are utilized in the execution of computer programs. The arithmetic circuit may be utilized to build a Quadratic Arithmetic Problem (QAP) that is compiled into a set of cryptographic routines for a client and a prover. The client and prover may utilize a protocol to delegate execution of a program to the prover in a manner that allows the client to efficiently verify the prover correctly executed the program. The arithmetic circuit may comprise a set of symbols (e.g., arithmetic gates and values) that is compressed to produce a serialised circuit comprising a set of codes, wherein the set of symbols is derivable from the set of codes in a lossless manner. Serialisation and de-serialisation techniques may be utilized by nodes of a blockchain network.