Arithmetic Coder Context Grouping for Fast Code Amount Prediction

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Solution Overview

Problem

Conventional coders using arithmetic coding struggle with precise prediction of code amount during provisional coding, leading to inefficiencies in processing time and accuracy.

Innovation Solution

The proposed coder divides binary symbol sequences into groups based on context and uses a circuit with a selector and multiple code amount approximating circuits to calculate prediction code amounts in parallel, mimicking arithmetic coding operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional arithmetic coding is used for provisional coding, then code amount prediction accuracy is improved, but processing time increases significantly

Engineering Contradiction:
Improvecode amount prediction accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The binary symbol sequence is divided into multiple groups based on different contexts (e.g., different syntax elements, macroblock types, or probability ranges). Each group is processed independently by separate code amount approximating circuits, enabling parallel computation that reduces overall processing time while maintaining prediction accuracy through context-specific approximation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the approximation parameters by using pre-calculated probability tables and context-specific models that estimate code amounts without performing full arithmetic coding. By adjusting the complexity of approximation based on context type (e.g., using simpler models for high-probability symbols), the system achieves acceptable prediction accuracy with reduced computational overhead.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If parallel code amount approximating circuits are used, then processing time is reduced, but device complexity increases

Engineering Contradiction:
Improveprocessing speedVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processing system is segmented into multiple dedicated code amount approximating circuits, each handling specific context groups. This segmentation enables parallel processing that improves productivity while keeping each individual circuit relatively simple, as each circuit is optimized for its specific context rather than handling all possible cases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of implementing one complex sequential arithmetic coding circuit, the patent creates multiple simplified copies of code amount approximating circuits that operate in parallel. Each copy is a streamlined version designed for specific context types, reducing the complexity of individual circuits while achieving overall high processing speed through parallelism.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP2091257B1coder
Publication Date: 2017.12.27 PANASONIC HOLDINGS CORP
  • EP2091257B1 patent drawingFigure 1
  • EP2091257B1 patent drawingFigure 2
  • EP2091257B1 patent drawingFigure 3

AI summary

A coder has a binarizing circuit (130) for converting multivalued data into a binary symbol sequence, the multivalued data being generated from an input signal and having a plurality of contexts, an arithmetic code amount approximating circuit (200) for calculating a prediction code amount in the predetermined coding unit from the binary symbol sequence, and a coding circuit (102) for coding the input signal arithmetically on the basis of the prediction code amount. The arithmetic code amount approximating circuit (200) includes a selector (230) for dividing the binary symbol sequence into a plurality of groups based on the contexts, a plurality of code amount approximating circuits (211-214) for calculating, from the binary symbol sequence divided into a plurality of groups, the prediction code amount of the group based on at least the section range in arithmetic coding, and an adder (231) for adding the prediction code amounts from all code amount approximating circuits and outputting the prediction code amount in the specified coding unit.