Arithmetic Coding Context Cache Layout for Faster Probability Access
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Solution Overview
Problem
Data processing systems performing arithmetic coding face challenges with high power consumption and circuit area due to the large number of registers needed for rapid access to probability values, and random access memory access speeds are insufficient to support high coding and decoding rates.
Innovation Solution
A cache memory is used to efficiently store probability values by mapping context index values such that frequently used contexts are grouped together, allowing for high-speed access and reducing cache line fetching and flushing, thereby optimizing caching efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If special purpose registers are used to store probability values for rapid access, then access speed is improved, but circuit area and power consumption increase
Solution Approach 1:
The patent divides the 460 contexts into multiple groups (e.g., 32 groups of 14 contexts each, or 64 groups of 7 contexts each). Each group is stored in a separate register file, allowing the system to use fewer registers per file while maintaining rapid access capability. This segmentation reduces the total circuit area compared to using 460 separate registers, while still providing fast access through group-based indexing.
Solution Approach 2:
The patent introduces a two-level addressing structure: a group index (selecting which register file to access) and a context index within the group (selecting the specific register). This dimensional change from direct 460-register addressing to hierarchical group-based addressing reduces the hardware footprint while maintaining access speed through parallel group selection and intra-group indexing.
2Area of stationary object
If random access memory is used to store probability data, then circuit area and power consumption are reduced, but access speed becomes insufficient
Solution Approach 1:
The patent creates a hybrid memory architecture where frequently accessed probability values (those in active groups) are stored in fast register files, while less frequently accessed values remain in slower but denser memory structures. This local quality differentiation ensures that the critical path operations use fast access while the overall system maintains low area and power consumption through selective caching in registers.
Solution Approach 2:
The system pre-loads probability values into register files for groups that are statistically likely to be accessed next, based on the correlated access patterns of video coding. By anticipating future access needs and pre-positioning data in fast memory, the system maintains high access speed without requiring all 460 contexts to be simultaneously available in fast memory, thus reducing overall circuit area.
3Speed
If all 460 contexts are stored in cache memory, then access speed is improved, but power consumption increases due to excessive cache line fetching and flushing
Solution Approach 1:
The patent segments the 460 contexts into multiple smaller groups that can be independently managed in cache memory. Only the currently active groups (e.g., 32 or 64 groups depending on configuration) are loaded into cache, rather than all 460 contexts. This segmentation reduces the cache size required, minimizing cache line fetching and flushing operations, thereby reducing power consumption while maintaining fast access for active contexts.
Solution Approach 2:
The patent implements dynamic group management where the set of active context groups is adjusted based on the current processing state and statistical likelihood of future accesses. Groups are dynamically loaded into and flushed from cache memory based on actual access patterns, ensuring that cache resources are continuously optimized for current needs rather than statically allocating cache for all possible contexts. This dynamic approach reduces unnecessary cache operations and associated power consumption.
Data Source
AI summary
Arithmetic coding utilizes probability values associated with contexts and context indexed values. The probability values are stored within a random access memory 6 from where they are fetched to a cache memory 8 before being supplied to an arithmetic encoder and decoder 4. The context indexed values used are mapped to the plurality of contexts employed such that context indexed values used to process data values close by in a position within the stream of data values being processed have a greater statistical likelihood of sharing a group of contexts than context values used to process data values far away in position within the stream of data values. Thus, a group of contexts for which the probability values are fetched together into the cache memory 8 will have an increased statistical likelihood of being used together in close proximity in processing the stream of data values. This reduces the number of cache flush operations and cache line fill operations.


