Arithmetic Garbled Circuits for Smaller Secure Computation Ciphertexts
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Solution Overview
Problem
Garbled circuits (GC) are less suitable for secure operations of arithmetic circuits compared to other secure multi-party computation (MPC) primitives, and existing methods for reducing garbled circuit ciphertext size are inefficient, particularly for Boolean circuits, leading to increased data transmission and scalability issues.
Innovation Solution
The use of arithmetic garbled circuits with algebraic garbling equations to generate garbled circuit ciphertexts, reducing the number of ciphertexts required for operations like multiplication and square operations by leveraging finite fields and algebraic representations, such as Galois fields (GF), to facilitate secure multi-party computations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Boolean garbled circuits are used for secure multi-party computation, then security is maintained, but the size of garbled circuit ciphertext becomes large and data transmission efficiency deteriorates
Solution Approach 1:
The patent changes the fundamental parameter of the garbling approach from Boolean circuits to Arithmetic Circuits over finite fields. This parameter change allows the system to represent arithmetic operations directly rather than converting them to Boolean logic, significantly reducing the number of ciphertexts required for operations like multiplication and square operations.
Solution Approach 2:
The patent substitutes the Boolean circuit mechanism with an arithmetic circuit mechanism based on finite fields. Instead of using Boolean gates and bit-level operations, the system uses algebraic operations over finite fields (such as GF(2^k)), which enables more efficient representation and computation of arithmetic functions with fewer ciphertexts.
2Reliability
If arithmetic circuits are implemented using traditional Boolean garbling methods, then security is maintained, but computational efficiency and scalability deteriorate
Solution Approach 1:
The patent changes the operational parameter from Boolean logic to arithmetic operations over finite fields. This allows direct computation of arithmetic functions without the overhead of Boolean conversion, improving computational efficiency for arithmetic circuits while maintaining security through the same garbling framework.
Solution Approach 2:
The patent creates a universal garbling framework that handles both Boolean and arithmetic circuits using the same finite field-based approach. This multi-functional capability allows the system to efficiently process various types of circuits (arithmetic, Boolean, hybrid) without requiring separate optimization for each type, thereby improving overall computational efficiency and scalability.
Data Source
AI summary
An electronic device and method that identifies at least one garbled circuit ciphertext generated based on a garbling equation set corresponding to a target operation from the memory, provides the identified at least one garbled circuit ciphertext to an evaluator device through the communication circuit, obtains a first result value of the garbling equation corresponding to at least one input value from the evaluator device through the communication circuit, and identifies a second result value of the target operation corresponding to the at least one input value based on the first result value.