Arithmetic Operator for Imaginary-Number Matrix Multiplication
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Solution Overview
Problem
Existing arithmetic operations using imaginary numbers with floating-point multiply-add operators require four instructions, limiting throughput due to restrictions in register usage and operation symmetry between ordinary and extended arithmetic operators in SIMD schemes.
Innovation Solution
The proposed solution involves an arithmetic operating apparatus that utilizes unused bits in instructions to set extended instruction information, allowing the apparatus to execute different processes for ordinary and extended arithmetic operators, enabling imaginary-number matrix multiplication-addition with reduced instructions by switching operands and operations between the operators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single floating-point multiply-add arithmetic operator is used for imaginary-number matrix multiplication-addition, then the device complexity is reduced, but the productivity decreases because four instructions are required
Solution Approach 1:
The register is divided into two distinct regions: a first region for storing real parts of complex numbers and a second region for storing imaginary parts. This segmentation allows the arithmetic operator to simultaneously process both real and imaginary components using a single operator, resolving the contradiction by enabling dual-function operation without increasing hardware complexity.
Solution Approach 2:
The single floating-point multiply-add arithmetic operator is designed to perform multiple functions by accepting different operand combinations from the segmented register regions. It can execute real-part multiplication, imaginary-part multiplication, and cross-term multiplication within the same operational framework, achieving multi-functionality without requiring multiple specialized operators.
2Productivity
If SIMD scheme is adopted with ordinary and extended arithmetic operators, then the productivity is improved by processing multiple data streams, but the device complexity increases due to multiple operators and register regions
Solution Approach 1:
The patent merges the functionality of separate ordinary and extended arithmetic operators into a single unified operator. By combining the processing capabilities for real and imaginary parts within one operator, the system achieves SIMD-like parallel processing throughput while eliminating the need for multiple physical operators, thus resolving the contradiction between productivity and device complexity.
3Adaptability or versatility
If register values are divided into first half region and second half region for ordinary and extended operators, then the adaptability is improved for SIMD operations, but the ease of operation decreases due to restricted operand selection
Solution Approach 1:
The system implements dynamic operand selection where the arithmetic operator can flexibly choose from multiple source register regions (first region, second region, or combinations thereof) based on the specific computational requirements. This dynamic flexibility allows the same operator to adapt to different operation types (real-part processing, imaginary-part processing, or mixed operations) without being constrained by fixed register assignments, resolving the contradiction between adaptability and ease of operation.
Data Source
AI summary
A technique realizes execution of various combinations of arithmetic operations in, for example, SIMD floating-point multiply-add arithmetic operation, with less instruction kind codes. An arithmetic operating apparatus sets, in one or more unused bits of a single arithmetic instruction, particular instruction information to instruct at least one of arithmetic operators to perform a process different from an ordinary process.