Arithmetic Processing Device Power Noise Control
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Solution Overview
Problem
High-performance processors with multiple cores generate significant power supply noise due to sudden changes in power consumption, leading to potential malfunctions, as the number of cores increases, exacerbating the degree of power consumption variation and noise.
Innovation Solution
An arithmetic processing device with a monitoring circuit that counts the number of cores in an instruction processing stopped state and a power control circuit that disables power save operations when the threshold is exceeded, moderating the power consumption variation by preventing excessive power save states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of cores is increased to improve processing performance, then productivity is improved, but power supply noise increases due to sudden changes in power consumption
Solution Approach 1:
The patent implements dynamic power management by introducing multiple power consumption states (first power consumption state with higher consumption and second power consumption state with lower consumption) that can be switched based on operational needs. The control circuit dynamically adjusts the power state of individual cores, allowing the system to optimize between performance and power noise characteristics in real-time based on workload conditions.
2Use of energy by moving object
If power save control is implemented by stopping clock supply to reduce power consumption, then use of energy is improved, but power supply noise increases when multiple cores simultaneously transition between states
Solution Approach 1:
The control circuit performs preliminary assessment before transitioning cores between power states by determining whether the number of cores in the second power consumption state would exceed a predetermined threshold. This preventive control mechanism avoids situations where simultaneous transitions of multiple cores would cause excessive power supply noise, by keeping some cores in the first power consumption state to buffer against abrupt collective state changes.
Solution Approach 2:
The system implements feedback control by continuously monitoring the number of cores in each power consumption state and using this information to make real-time decisions about state transitions. The control circuit adjusts the power state of cores based on the current distribution of cores between states, ensuring that transitions are managed to prevent exceeding the predetermined threshold and causing power supply noise issues.
3Use of energy by moving object
If clock supply is stopped to internal circuits to transition to power save state, then use of energy is improved, but reliability deteriorates when excessive cores are in stopped state due to power supply noise
Solution Approach 1:
The control circuit performs preliminary assessment before transitioning cores between power states by determining whether the number of cores in the second power consumption state would exceed a predetermined threshold. This preventive control mechanism avoids situations where simultaneous transitions of multiple cores would cause excessive power supply noise, by keeping some cores in the first power consumption state to buffer against abrupt collective state changes.
Data Source
AI summary
An arithmetic processing device includes a plurality of arithmetic processing units each including, an internal circuit that, in an instruction processing state in which an instruction is processed, processes the instruction and that, in an instruction processing stopped state in which instruction processing is stopped, transitions to a state of power save operation, and a power control circuit that disables the power save operation; and a monitoring circuit that monitors the instruction processing stopped state of the plurality of arithmetic processing units and counts the number of the arithmetic processing units in the instruction processing stopped state. The power control circuit of each of the plurality of arithmetic processing units disables the power save operation of the arithmetic processing unit in the instruction processing stopped state, in a case where the number of the arithmetic processing units in the instruction processing stopped state exceeds a threshold.