Arithmetic Units with Dynamic SIMD-MIMD Mode Switching
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Solution Overview
Problem
Current data processing circuits face limitations in flexibility and efficiency due to fixed architectures, such as SIMD and MIMD, which restrict the ability to dynamically change operation modes according to varying operating environments, leading to increased hardware size and power consumption.
Innovation Solution
A data processing circuit with a control unit outputting operation and memory control signals, allowing multiple program memories and arithmetic sections to selectively perform commands, enabling flexible operation between SIMD and MIMD modes by dynamically selecting memory and commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If SIMD architecture is used, then minimal program memory is used, but various arithmetic operations cannot be performed simultaneously
Solution Approach 1:
The patent implements dynamic mode switching between SIMD and MIMD architectures based on operational requirements. The control unit dynamically selects between reading instructions from a single program memory (SIMD mode) or multiple program memories (MIMD mode), allowing the system to adapt between memory efficiency and operational versatility depending on the task at hand.
Solution Approach 2:
The patent creates a universal processor architecture that can function in multiple modes - both SIMD and MIMD - within the same hardware framework. This multi-functionality allows a single processor to minimize program memory when executing repetitive arithmetic operations while switching to MIMD mode when diverse arithmetic operations are required, thus resolving the trade-off between memory size and operational variety.
2Adaptability or versatility
If MIMD architecture is used, then various arithmetic operations can be performed simultaneously, but program memory size increases
Solution Approach 1:
The system dynamically adjusts its memory access pattern based on the required arithmetic operations. When diverse operations are needed, it activates MIMD mode to access multiple program memories simultaneously; when uniform operations are sufficient, it switches to SIMD mode using a single program memory, thereby optimizing the balance between versatility and memory size.
Solution Approach 2:
The patent changes the operational parameters by switching between different memory access modes. The control unit modifies the instruction reading mechanism from single-memory (SIMD) to multi-memory (MIMD) access based on the operational requirements, allowing the system to adjust the effective program memory size utilization without physically changing the hardware architecture.
3Adaptability or versatility
If multiple controllers are used to control arithmetic units independently, then operation modes can be changed, but hardware size and power consumption increase
Solution Approach 1:
The patent makes the single control unit multi-functional by enabling it to manage both SIMD and MIMD modes. Instead of requiring separate controllers for different operation modes, the control unit incorporates the capability to dynamically switch between memory access patterns, thereby achieving mode flexibility without proportionally increasing hardware size.
Solution Approach 2:
The patent merges the control functions for different operation modes into a single control unit. Rather than having independent controllers for SIMD and MIMD modes, the design combines these control functions, reducing the overall number of controllers while maintaining the ability to switch between operational modes flexibly.
Data Source
AI summary
Provided is a data processing circuit. A control unit outputs an operation control signal and a memory control signal. A plurality of program memories each outputs a command in response to the memory control signal. A plurality of arithmetic sections each selectively performs any one of the commands from the plurality of program memories in response to the operation control signal. Operation modes of the data processing circuit can be flexibly changed according to operation environments.