Array Antenna Signal Combining to Cut ADC Complexity

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Solution Overview

Problem

Existing phased array antenna systems face increased complexity and power consumption as the number of antenna elements grows, necessitating more analog-to-digital converters (ADCs), which is inefficient in terms of power, volume, and weight.

Innovation Solution

A system and method that utilize a code generator to produce unique code signals, filter and multiply antenna element signals to reduce side-lobes, and then sum these signals for processing with a single or reduced number of ADCs, enabling digital processing with fewer converters and reducing interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of antenna array elements increases, then the signal processing capability and array performance improve, but the complexity and power consumption increase due to requiring more ADCs

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple antenna element signals into a single composite analog signal before conversion to digital domain. Multiple receiving chains are merged into one, allowing a single ADC to process signals from multiple antenna elements through code division multiplexing, thereby reducing the total number of ADCs required while maintaining the ability to process signals from increased numbers of antenna elements

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces code signals as an intermediary mechanism to enable multiple antenna element signals to share a common ADC. Each antenna element is assigned a unique code signal that modulates its received signal, allowing the ADC to distinguish and separately process signals from different antenna elements through code correlation in the digital domain

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the number of antenna array elements increases, then the signal processing capability improves, but the power consumption increases linearly with the number of ADCs

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple receiving chains into a single conversion path, combining the functions of multiple ADCs into one shared ADC resource. This consolidation dramatically reduces the total power consumption of the ADC subsystem while maintaining the capability to process signals from multiple antenna elements through code division multiplexing and digital signal separation

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If the number of antenna array elements increases, then the signal processing capability improves, but the volume and weight increase due to more ADC components

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidsystem volume
Core Design Contradiction:
Adaptability or versatilityVSVolume of moving object

Solution Approach 1:

The patent merges multiple receiving chains into a single conversion path, combining the functions of multiple ADCs into one shared ADC resource. This consolidation dramatically reduces the total power consumption of the ADC subsystem while maintaining the capability to process signals from multiple antenna elements through code division multiplexing and digital signal separation

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3011684B1A system and method for receiving and processing array antenna signals
Publication Date: 2021.10.13 ELTA SYST LTD
  • EP3011684B1 patent drawingFigure 1
  • EP3011684B1 patent drawingFigure 2
  • EP3011684B1 patent drawingFigure 3

AI summary

A system for receiving signals from an array antenna that includes a first number of antenna elements, including an orthogonal signals generator module configured to generate the first number of orthogonal signals. Plurality of multipliers configured to receive array antenna element analog signals and the first number of orthogonal signals and generate a corresponding multiplied analog signal, giving rise to a first number of multiplied analog signals. A second number of summation modules configured to receive the first number of multiplied analog signals from the multipliers and generate a second number of summed analog signals. A second number of analog to digital converters configured to receive the summed analog signals and generate the second number of summed digital signals. The summed digital signals are capable of being fed to a digital processor for generating a processed signal of the array antenna, wherein the second number falls in the range of 1 to less than the first number.