High-density array chip track regions for alignment correction
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Solution Overview
Problem
Existing array chips face challenges in achieving high spatial resolution, accuracy, and speed for imaging and image processing, particularly in densely packed biochemical assays, due to competing demands on spatial resolution, accuracy, and throughput.
Innovation Solution
The design of high-density array chips incorporates track regions with different pitches and densities compared to field regions, allowing for real-time alignment and correction of imaging instruments using quad-cell alignment techniques, enabling precise alignment and efficient data extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high magnification is used to resolve individual sites, then spatial resolution is improved, but field of view decreases and imaging speed decreases
Solution Approach 1:
The chip is divided into field regions containing element sites and separate track regions containing alignment spots. This segmentation allows the field regions to be imaged at high magnification for spatial resolution while the track regions provide alignment information that enables stitching together multiple fields of view to cover larger areas.
Solution Approach 2:
The patent introduces track regions as a separate dimensional element on the chip that serves alignment purposes. By adding this additional structural dimension (the track regions with their specific spot patterns), the system can achieve both high magnification imaging of field regions and maintain awareness of larger area coverage through alignment data.
2Measurement precision
If high magnification is used to resolve individual sites, then spatial resolution is improved, but imaging speed decreases
Solution Approach 1:
Alignment spots are pre-positioned in track regions at known locations with specific patterns. This preliminary arrangement of alignment features allows the imaging system to quickly locate and align with chip features without requiring time-consuming search and focus procedures, thereby maintaining high imaging speed while achieving high spatial resolution.
Solution Approach 2:
The imaging system uses the pattern of alignment spots in track regions to provide feedback on chip position and orientation. This feedback mechanism enables real-time correction of alignment errors, allowing the system to maintain high imaging speed by avoiding repeated alignment adjustments while preserving spatial resolution through precise positioning.
3Measurement precision
If track regions are added for alignment, then alignment accuracy is improved, but chip area for elements decreases
Solution Approach 1:
The chip is designed with different local qualities: field regions optimized for containing element sites at high density, and track regions optimized for alignment functions. This local differentiation allows each region to serve its specific purpose efficiently, with track regions providing necessary alignment accuracy while field regions maximizing element capacity.
Solution Approach 2:
The track regions occupy only a small fraction of the total chip area, providing sufficient alignment information without excessively reducing the area available for elements. The alignment spots are arranged in efficient patterns that achieve the required alignment accuracy with minimal space consumption.
Data Source
AI summary
An array chip design is provided where the chip includes a field region arranged with sites according to a first pitch and at least one track region having a one-dimensional site pattern arranged according to a second pitch that is less dense and is an integer multiple of the first pitch so that observation through pixel-based sensors using one-dimensional quad-cell averaging can be applied in the track region, thereby to attain alignment of the chip to pixel-based optical instrumentation with a higher density of sites.