Semiconductor Array Edge Patterning With Periphery Blocking Structure

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Solution Overview

Problem

The iso dense effect at the edge of active area array regions in semiconductor structures leads to varying sizes and spacings, necessitating costly and time-consuming optical proximity correction.

Innovation Solution

A method involving the formation of a blocking structure in the periphery region abutting the array region, where the patterned photoresist layer extends directly over the blocking structure, effectively eliminating the iso dense effect and forming a guard ring around the array region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If optical proximity correction is applied to solve the iso dense effect, then manufacturing precision is improved, but loss of time and cost increase

Engineering Contradiction:
Improveuniformity of active area arrayVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The blocking structure is formed in advance in the periphery region before the active area array patterning process. This preliminary structure prevents the iso dense effect from occurring at the edges, eliminating the need for subsequent optical proximity correction and reducing overall processing time while maintaining manufacturing precision

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If optical proximity correction is applied to solve the iso dense effect, then manufacturing precision is improved, but cost increases

Engineering Contradiction:
Improveuniformity of active area arrayVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The blocking structure is formed in advance in the periphery region before the active area array patterning process. This preliminary structure prevents the iso dense effect from occurring at the edges, eliminating the need for subsequent optical proximity correction and reducing overall processing time while maintaining manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11978638B2Semiconductor structure and method for forming the same
Publication Date: 2024.05.07 WINBOND ELECTRONICS CORP
  • US11978638B2 patent drawing
  • US11978638B2 patent drawing
  • US11978638B2 patent drawing

AI summary

A method for forming a semiconductor structure forming a blocking structure in the periphery region over the bottom layer. The method includes covering the middle layer over the bottom layer and the blocking structure. The method includes forming a patterned photoresist layer over the middle layer. The patterned photoresist layer is in the array region and directly over the blocking structure in the periphery region. The method includes transferring the pattern of the patterned photoresist layer to the bottom layer. The pattern of the patterned photoresist layer directly over the blocking structure is not formed in the bottom layer. The first portion of the substrate is in the array region and is an active area array. The second portion of the substrate is in the periphery region and is a guard ring. The third portion of the substrate is in the periphery region and is a periphery structure.