Array Substrate Pad Openings for Micro LED Solder Alignment

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Solution Overview

Problem

The challenge of false soldering between pins and pads due to offset of electronic elements in micro LED arrays, leading to reduced yield in display devices, is addressed.

Innovation Solution

The array substrate design includes pads partially located in openings, with solder flowing to drive pins to their correct positions during soldering, ensuring accurate alignment and reducing offset, and incorporates multiple insulating layers for adhesion and protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electronic elements are mounted on the array substrate, then the display device achieves desired functionality, but offset during soldering causes false soldering between pins and pads, reducing product yield

Engineering Contradiction:
Improvesoldering accuracyVSAvoidproduct yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The pad is pre-positioned within the first opening in the first insulating layer before the electronic element is mounted. This preliminary positioning structure ensures that when the electronic element is subsequently soldered, the pin aligns with the pad through the opening, preventing offset and false soldering, thereby improving both soldering accuracy and product yield

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The first opening in the first insulating layer serves as an intermediary structure that guides the pin of the electronic element to the pad. The opening acts as a physical mediator that constrains the positioning relationship between the electronic element and the substrate during soldering, eliminating the need for high-precision alignment while preventing false soldering

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple insulating layers are used to protect the array substrate, then insulation and adhesion are enhanced, but the device structure becomes more complex

Engineering Contradiction:
Improveinsulation performanceVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of uniformly increasing insulation throughout the entire device, the patent applies insulating layers selectively only where needed - specifically the first insulating layer with the first opening at the soldering locations. This localized approach provides necessary insulation and positioning functionality without adding unnecessary complexity to the overall device structure

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The first insulating layer serves multiple functions simultaneously: it provides electrical insulation between conductive elements, acts as a structural support for positioning the pad, and creates the first opening that guides pin alignment during soldering. This multi-functionality reduces the need for separate dedicated components, thereby maintaining structural simplicity while achieving reliable insulation

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively prevents false soldering, increases product yield, and enhances the reliability and insulation of the array substrate.

Implementation Method 1

a solder coated on surfaces of the pins, after being melted, flows to the first openings to drive each of the pins to move to the pad with which the pin is soldered

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

a solder coated on surfaces of the pins, after being melted, flows to the first openings

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Data Source

PatentUS12575239B2Array substrates and display devices
Publication Date: 2026.03.10 HEFEI BOE RUISHENG TECH CO LTD
  • US12575239B2 patent drawing
  • US12575239B2 patent drawing
  • US12575239B2 patent drawing

AI summary

The present application provides an array substrate and a display device. The array substrate includes a base, a first insulating layer located on the base, a first conductive layer located on the first insulating layer, a second insulating layer located on the first conductive layer, and an electronic element located on the first conductive layer. The first insulating layer is provided with a plurality of first openings. The first conductive layer includes a plurality of pads, each of which is at least partially located in one of the first openings. The second insulating layer is provided with a plurality of second openings. An orthographic projection of each first opening on the base falls into that of one of the second openings on the base. The electronic element includes an electronic element body, and a plurality of pins located on a side of the electronic element body toward the base. Each of the pins is at least partially located in the first opening and the second opening, and is soldered with the pad. The display device includes the array substrate.