Array Strip Processing for Low-Buffer Parallel Computation

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Solution Overview

Problem

Existing pipelined systems for processing two-dimensional data frames as one-dimensional streams are inefficient due to memory-intensive line buffering and intermittent output streams when using kernel windows with vertical strides greater than one.

Innovation Solution

The input array is divided into strips, each comprising at least one primary vector, and processed by a set of processing elements in a parallel scheme, where adjacent strips are assigned to adjacent processing elements to leverage intra-row connections for efficient processing, reducing the need for line buffers and optimizing memory usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the input array is processed as a one-dimensional stream of concatenated frame lines in existing pipelined systems, then the processing can be performed sequentially, but memory requirements increase due to line buffering and output streams become intermittent when using kernel windows with vertical strides greater than one

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidmemory requirements
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The input array is divided into multiple strips, where each strip corresponds to a portion of the array that can be processed independently. This segmentation allows parallel processing across multiple processing elements without requiring large buffers to store entire frame lines, thereby reducing memory requirements while maintaining processing efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from processing the array as a single one-dimensional stream to organizing it into multiple strips that can be processed in parallel. This dimensional reorganization enables simultaneous processing of multiple data elements without increasing memory buffer requirements, as each processing element handles a specific strip independently.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If line buffering is used in existing pipelined systems to handle kernel windows with vertical strides greater than one, then processing can be performed, but device complexity increases due to additional buffering mechanisms

Engineering Contradiction:
Improvehandling vertical stride > 1VSAvoidbuffering mechanisms
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

By segmenting the input array into strips and assigning each to a dedicated processing element, the system handles vertical strides greater than one without requiring complex buffering mechanisms. Each processing element independently processes its assigned strip, eliminating the need for centralized line buffers and reducing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processing element is assigned a specific strip and processes it independently without requiring assistance from buffering mechanisms or other processing elements. This self-service approach allows the system to handle various vertical strides efficiently while maintaining simple device architecture.

Inventive Principle:
Principle #25Self-service

3Productivity

If the input array is divided into strips and processed in parallel by multiple processing elements, then processing efficiency improves and memory requirements are reduced, but the system complexity increases due to strip division and assignment mechanisms

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidstrip division and assignment
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The input array is segmented into strips that can be distributed to multiple processing elements. This segmentation enables parallel processing and improves productivity, while the segmentation itself is implemented through simple indexing and assignment mechanisms that do not significantly increase system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The strip division and assignment mechanism is designed to be universally applicable to different array sizes and processing configurations. The same basic mechanism of dividing the array into strips and assigning them to processing elements works for various scenarios, reducing the need for complex specialized handling and minimizing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250371071A1System and method for processing arrays
Publication Date: 2025.12.04 AT-MEMORY COMPUTING LP
  • US20250371071A1 patent drawing
  • US20250371071A1 patent drawing
  • US20250371071A1 patent drawing

AI summary

An example computing device includes: a set of processing elements; a controller interconnected with the set of processing elements, the controller configured to: divide an input array into a plurality of strips, each strip comprising at least one primary vector; define a plurality of strip representations, each strip representation comprising a 1-dimensional array representing a respective strip; assign each strip representation to one processing element in the set; control the set of processing elements to process the respective assigned strip representation to obtain a partial result for each element in the strip representation; and aggregate the partial results to obtain a final result representing a characteristic metric for the array.