Array Substrate Additional Data Lines for Response Speed

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Solution Overview

Problem

High pixel density in TFT-LCD displays leads to a large number of gate lines, resulting in signal delay and reduced response speed due to progressive scanning of subpixels, which adversely affects display quality.

Innovation Solution

The introduction of secondary data lines that allow simultaneous scanning and signal input to multiple gate lines, reducing signal delay by enabling simultaneous data signal transmission to subpixels across different rows, thereby improving response speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of gate lines is increased to achieve high pixel density, then the display resolution is improved, but the response speed is reduced due to progressive scanning delays

Engineering Contradiction:
Improvedisplay resolutionVSAvoidresponse speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent divides the data signal transmission path into two separate paths: original data lines and additional data lines. By segmenting the transmission system, multiple gate lines can receive data signals simultaneously through different paths, eliminating the progressive scanning delay while maintaining high pixel density display capability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an additional dimension to the data signal transmission by adding parallel data transmission paths (additional data lines) alongside the original data lines. This dimensional expansion allows simultaneous data delivery to multiple gate lines, resolving the time delay issue caused by sequential scanning

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If progressive scanning of gate lines is used to simplify control, then the device complexity is reduced, but the transmission speed of data signals is reduced

Engineering Contradiction:
Improvecontrol complexityVSAvoiddata signal transmission speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The control system is segmented into two independent but coordinated control paths: one controlling original data lines and another controlling additional data lines. This segmentation allows parallel data transmission while maintaining relatively simple control logic through the use of control signals that manage the two paths

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the functionality of multiple data transmission paths into a unified system where original data lines and additional data lines work together. By combining these paths, the system achieves high-speed parallel transmission while keeping control complexity manageable through integrated signal management

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3282312B1Array substrate and driving method therefor, and display device
Publication Date: 2020.11.25 BOE TECHNOLOGY GROUP CO LTD
  • EP3282312B1 patent drawingFigure 1
  • EP3282312B1 patent drawingFigure 2
  • EP3282312B1 patent drawingFigure 3

AI summary

The present disclosure provides an array substrate, its driving method and a display device. The array substrate includes a plurality of gate lines, a plurality of data lines, and a plurality of subpixels defined by the gate lines and the data lines crossing each other. At least one additional line for providing an additional data signal is arranged between the subpixels in two adjacent columns, the subpixels in an identical column correspond to at least one additional line, and at least one subpixel among the subpixels in an identical column is driven by the additional line corresponding to the at least one subpixel.