Array Substrate Electrode Structure for Shorter AS Tails

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Solution Overview

Problem

The 4Mask manufacturing process for array substrates results in long amorphous silicon tails (AS tails) that adversely affect the stability of driving signals due to the excessive length of outward protrusions of active layers compared to source and drain electrodes.

Innovation Solution

The array substrate design incorporates a metal barrier layer with a first protrusion extending from the conductive metal layer away from the channel region, reducing the length of outward protrusions and improving signal stability by forming a more protruding metal barrier layer compared to the conductive metal layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If 4Mask manufacturing process is used to reduce manufacturing cost, then manufacturing precision deteriorates resulting in long amorphous silicon tails

Engineering Contradiction:
Improvemanufacturing costVSAvoidactive layer protrusion length
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The source electrode and drain electrode are segmented into multiple layers: a first metal layer (aluminum alloy) and a second metal layer (molybdenum). This segmentation allows different etching rates for different materials, enabling the second metal layer to protrude beyond the active layer while the first metal layer extends further, thus reducing the amorphous silicon tail length while maintaining the 4Mask process

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the electrode structure are assigned different materials with different properties. The molybdenum layer (second metal layer) has slower etching rate and forms protrusions at specific locations to locally control the electrode-active layer interface, while the aluminum alloy layer (first metal layer) provides overall conductivity and extends further to ensure electrical connection

Inventive Principle:
Principle #3Local quality

2Reliability

If active layer protrusions extend beyond source and drain electrodes, then device stability deteriorates due to increased parasitic capacitance

Engineering Contradiction:
Improvedriving signal stabilityVSAvoidelectrode-active layer alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The second metal layer (molybdenum) is formed to protrude beyond the active layer boundaries in advance, creating a preliminary structure that prevents excessive amorphous silicon tail formation. This preliminary protrusion structure controls the etching process to ensure the active layer does not extend too far beyond the electrode, thereby maintaining driving signal stability

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the length of outward protrusions of the active layer relative to the electrodes, enhancing the stability of driving signals by minimizing parasitic capacitance differences under light and non-light conditions.

Implementation Method 1

etching the first metal layer and the second metal layer by using an etching solution to respectively form a metal barrier layer and a conductive metal layer, wherein an etching rate of the first metal layer in the etching solution is less than an etching rate of the second metal layer in the etching solution

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS20240030229A1Array substrate, method for fabricating same, and display panel
Publication Date: 2024.01.25 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US20240030229A1 patent drawing
  • US20240030229A1 patent drawing
  • US20240030229A1 patent drawing

AI summary

An array substrate, a method for fabricating the same, and a display panel are disclosed. The array substrate includes a base, an active layer, a source electrode, and a drain electrode that are sequentially disposed. The active layer includes a channel region. The source electrode and the drain electrode are located at opposing sides of the channel region. The source electrode and the drain electrode both include a metal barrier layer and a conductive metal layer that are sequentially disposed at an end of the source electrode away from the channel region and/or the drain electrode away from the channel region. The metal barrier layer includes a first protrusion, and the first protrusion extends from an end portion of the conductive metal layer in a direction away from the channel region.