Array Substrate with Auxiliary Dielectric Patterns for Static Management
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Solution Overview
Problem
In the production of TFT-LCDs, the gate insulating layer in the array substrate easily generates static electricity, damaging thin film transistors and resulting in poor display performance.
Innovation Solution
The integration of auxiliary dielectric patterns with larger cross-sectional areas than main dielectric patterns in the array substrate's dielectric layer, which absorbs major static electricity, is used to mitigate the issue of poor display caused by static electricity in the gate insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate insulating layer is disposed on a substrate in a conventional array substrate, then the gate insulating layer provides electrical insulation, but static electricity accumulates in the gate insulating layer causing poor display
Solution Approach 1:
A dielectric layer is introduced as an intermediary between the gate insulating layer and the substrate. This dielectric layer acts as a mediator to absorb and dissipate static electricity that accumulates in the gate insulating layer, preventing it from causing display defects while maintaining the electrical insulation function of the gate insulating layer.
Solution Approach 2:
The dielectric layer converts the harmful static electricity accumulation into a beneficial effect by providing a controlled path for charge dissipation. The dielectric material's properties allow it to absorb and gradually release static charges, transforming the potentially damaging static electricity into a harmless or even useful charge management mechanism that improves display reliability.
2Object-affected harmful factors
If auxiliary dielectric patterns with larger cross-sectional areas are added to absorb static electricity, then static electricity absorption is improved, but device structure becomes more complex
Solution Approach 1:
The dielectric layer is segmented into different patterns with different functions: main dielectric patterns that partially overlap with shielding layers for charge management, and auxiliary dielectric patterns with larger cross-sectional areas positioned among the main patterns for enhanced static electricity absorption. This segmentation allows each pattern type to be optimized for its specific function while working together as a integrated system.
Solution Approach 2:
Different regions of the dielectric layer are assigned different qualities and functions. The auxiliary dielectric patterns have larger cross-sectional areas specifically in regions where static electricity absorption is most needed, while the main dielectric patterns have smaller areas optimized for their overlapping function with shielding layers. This local differentiation optimizes overall performance without uniformly increasing complexity throughout the entire device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces the phenomenon of poor display in the array substrate by absorbing significant static electricity, thereby enhancing the reliability and performance of TFT-LCDs.
Implementation Method 1
the dielectric layer is used to absorb static electricity in the gate insulating layer
Implementation Method 2
cross-sectional areas of the auxiliary dielectric patterns are greater than cross-sectional areas of the main dielectric patterns
Data Source
AI summary
The present disclosure provides an array substrate. The array substrate includes a plurality of shielding layers disposed on a glass substrate and arranged at intervals; a dielectric layer spread on the glass substrate and covering the shielding layers, wherein the dielectric layer includes a plurality of dielectric patterns, the dielectric patterns include main dielectric patterns and auxiliary dielectric patterns disposed on at least one side of the main dielectric patterns; and a gate insulating layer disposed on the dielectric layer.