Array Substrate Buffer Layer Prevents Gate Metal Breakage
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Solution Overview
Problem
The existing array substrates face issues with gate metal layer breakage during the formation of gate and gate lines, leading to signal disruption and reduced quality of thin film transistors due to excessive contact resistance and edge etching in top gate type thin film transistors.
Innovation Solution
A fabricating method for an array substrate that involves forming a buffer layer using an organic material solution, which is spread and solidified to create a flatter surface, thereby preventing breakage of the gate metal layer during the deposition of gate and gate lines, and includes forming via holes to connect source, drain, and light shading member, ensuring proper signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buffer layer is formed using conventional methods, then the gate metal layer may break during deposition, but forming a buffer layer using organic material solution spin coating and thermal solidification creates a flatter surface that prevents breakage
Solution Approach 1:
A buffer layer is formed on the light shading member before depositing the gate metal layer. This buffer layer serves as a preliminary protective structure that prevents breakage of the gate metal layer during subsequent deposition processes, ensuring reliable signal transmission in top gate type thin film transistors.
Solution Approach 2:
The buffer layer is formed by spreading an organic material solution and then thermal solidification at 220-250°C. This parameter change approach (using solution processing followed by controlled thermal treatment) creates a flatter surface compared to conventional buffer layer formation methods, effectively preventing gate metal layer breakage at the edges of light shading members.
2Reliability
If top gate type thin film transistors are used to improve displaying effect, then parasitic capacitance decreases, but gate metal layer breakage occurs leading to signal disruption
Solution Approach 1:
The buffer layer acts as an intermediary structure between the light shading member and the gate metal layer. It provides a protective interface that prevents direct contact and potential breakage at sharp edges, while still allowing the top gate type thin film transistor structure to maintain its low parasitic capacitance advantage for improved displaying effect.
3Manufacturing precision
If the organic material solution is solidified by thermal treatment at 220-250°C, then a flatter buffer layer surface is formed, but additional process steps are required
Solution Approach 1:
Thermal solidification at 220-250°C transforms the organic material solution into a solid buffer layer with a flatter surface. This parameter change (temperature control during solidification) improves manufacturing precision of the buffer layer surface, reducing gate metal layer breakage while the process remains integrated into the existing fabrication workflow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the quality of the array substrate by reducing signal delays and distortions, improving the mobility of thin film transistors, and preventing gate metal layer breakage, ensuring reliable signal reception and improved display performance.
Implementation Method 1
the step of solidifying the organic material solution is conducted by using thermal solidification, wherein a temperature of the thermal solidification is between 220° C.-250° C.
Implementation Method 2
the step of spreading the organic material solution is conducted by using a spin coating procedure
Data Source
AI summary
The present disclosure provides a fabricating method of an array substrate, comprising: forming a pattern comprising a light shading member; spreading an organic material solution; solidifying the organic material solution, to form a buffer layer; forming a pattern of an active layer on the buffer layer, wherein a position of the active layer corresponds to a position of the light shading member; and forming a gate pattern, where the gate pattern is located on the active layer and is insulated from the active layer. Correspondingly, the present disclosure further provides an array substrate and a display device.