Array Substrate Bump Unit for Narrow Bezel Bonding
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Solution Overview
Problem
The challenge is to reduce the width of the bonding region in array substrates for ultra-narrow bezel displays while ensuring the drawing force of chip on film (COF) modules meets the required standards, as narrowing the bonding region compromises the drawing force.
Innovation Solution
The array substrate incorporates a bump unit with a gate line bump layer and a data line bump layer, featuring a concave-convex structure to increase contact area with the COF, and a conductive layer to enhance bonding, allowing for a reduced bonding region width while maintaining sufficient drawing force.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the bonding region width is reduced to achieve ultra-narrow bezel displays, then the screen-to-body ratio is improved, but the drawing force of COF modules deteriorates
Solution Approach 1:
The patent transitions from a planar bonding interface to a three-dimensional concave-convex structure. The bump units create vertical height differences and hollowed-out portions that increase the bonding surface area without expanding the horizontal bonding region width, thereby maintaining narrow bezel while improving drawing force
Solution Approach 2:
The bonding region is segmented into multiple bump units distributed across the bonding area. Each bump unit contains hollowed-out portions that further segment the contact interface, creating multiple localized bonding zones that collectively enhance the overall drawing force within a compact width
2Area of moving object
If the bonding region width is reduced, then the bezel width is narrowed, but the contact area between bump layers and COF is insufficient
Solution Approach 1:
The patent utilizes the vertical dimension by creating concave-convex structures with hollowed-out portions. This three-dimensional configuration increases the contact area between bump layers and COF modules without requiring an increase in the horizontal bonding region width
Solution Approach 2:
The bump units incorporate hollowed-out portions that create a porous-like structure within the solid material. This internal void space increases the effective surface area for bonding while maintaining a compact external footprint, enabling sufficient contact area within a narrow bonding region
Data Source
AI summary
The present disclosure provides an array substrate and a fabrication method thereof, a display panel and a display module. The array substrate has a display region and a bonding region for bonding with a circuit board, and including: a data line and a gate line in the display region; and a bump unit in the bonding region. The bump unit includes: a gate line bump layer, which is in a same layer and made of a same material as the gate line, is connected to the data line, and includes a main body portion and a plurality of hollowed-out portions in the main body portion; and a data line bump layer, which is in a same layer and made of a same material as the data line, and covers the main body portion and the plurality of hollowed-out portions of the gate line bump layer.