Array Substrate Copper Etching for Low CD Loss

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Solution Overview

Problem

The slow etching speed of the liner layer in conventional etching solution systems leads to excessive critical dimension loss (CD loss) of the copper conductive layer, resulting in a low aperture ratio for 8K display panels, which increases energy consumption and limits the application of the 4-mask process.

Innovation Solution

A manufacturing method for an array substrate involving sequential lamination of layers, including a copper conductive layer and a liner layer, with specific etching treatments using hydrogen peroxide solutions and gaseous mixtures of sulfur hexafluoride and chlorine to control etching times and reduce CD loss, ensuring the liner layer is retained and the copper conductive layer is etched completely without excessive loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the etching time is extended to completely etch the liner layer, then the metal residue is prevented, but the CD loss of the copper conductive layer becomes excessively large

Engineering Contradiction:
Improvemetal residue preventionVSAvoidCD loss of copper conductive layer
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The etching process is divided into multiple stages: first etching the copper conductive layer to complete removal, then performing a second etching on the liner layer with controlled time and parameters. This segmentation allows each layer to be etched optimally without excessive CD loss on the copper layer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The copper conductive layer is etched completely first as a preliminary step before etching the liner layer. This preliminary action removes the copper layer entirely, establishing a foundation for subsequent liner layer etching without the constraint of preserving copper dimensions.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the 4-mask process is used with two wet etching treatments, then the manufacturing efficiency is improved, but the CD loss of the metal layer increases and aperture ratio decreases

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidCD loss of metal layer
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The etching parameters are changed by introducing a dry etching step with specific gas compositions (CF4, SF6, Cl2) and controlling etching times (50-60 seconds for wet etching, followed by dry etching). This parameter optimization reduces CD loss while maintaining the efficiency benefits of the 4-mask process.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the liner layer etching speed is slow in conventional etching solution system, then the copper conductive layer can be etched completely, but the etching time must be extended causing large CD loss

Engineering Contradiction:
Improvecopper conductive layer complete etchingVSAvoidetching time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The etching process continues seamlessly from copper layer removal to liner layer etching without interruption. The continuous action ensures complete copper removal and proceeds immediately to liner layer processing, optimizing total etching time while preventing metal residue.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method significantly reduces CD loss and improves the aperture ratio by optimizing etching times and adding dry etching steps, enhancing the efficiency and performance of the array substrate in 8K display panels.

Implementation Method 1

performing a first wet etching treatment on the copper conductive layer... an etching solution used in the first wet etching treatment... is a hydrogen peroxide solution

Methodology Applied
Scientific EffectChemical etching: Chemical Bonding

Implementation Method 2

performing an ashing treatment on the photoresist layer positioned in a first region... a gas used in the ashing treatment is oxygen

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 3

performing a first dry etching treatment on the liner layer, the ohmic contact layer, and the amorphous silicon layer... an etching gas used in the first dry etching treatment... includes a gaseous mixture containing sulfur hexafluoride and chlorine

Methodology Applied
Scientific EffectChemical etching: Chemical Bonding

Data Source

PatentUS11791351B2Array substrate and manufacturing method thereof
Publication Date: 2023.10.17 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US11791351B2 patent drawing
  • US11791351B2 patent drawing
  • US11791351B2 patent drawing

AI summary

The present disclosure provides an array substrate and a manufacturing method of the array substrate. In the manufacturing method of the array substrate, during performing a first wet etching and a second wet etching on a second metal layer, the wet etching is stopped when a copper conductive layer is merely etched completely. Because a wet etching speed of a liner layer is slow, an etching time of the wet etching and a CD loss of the copper conductive layer can be greatly reduced, and the CD loss is relatively small. Meanwhile, an entire CD loss of the second metal layer can be reduced, and an aperture ratio can be improved.