Array Substrate Common Electrode Longitudinal Layout
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Solution Overview
Problem
The existing array substrate design has a large overlapping area between the common electrode and the pixel electrode, which hinders wide-screen displaying due to the transverse layout of the common electrode line.
Innovation Solution
The common electrode line is repositioned to be parallel to the data lines, reducing the overlapping area by forming it in the same layer as the data lines and source/drain electrodes, and located between every two data lines, allowing for a longitudinal layout that shares common electrodes between odd and even-number columns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the common electrode line is disposed transversely (parallel to gate lines), then the common electrode can be formed in the same layer as the gate electrode, but the overlapping area between the common electrode and pixel electrode becomes too large, which is disadvantageous for wide-screen displaying
Solution Approach 1:
The patent inverts the conventional transverse layout of the common electrode line to a longitudinal layout (parallel to data lines), fundamentally changing the orientation to reduce the overlapping area with pixel electrodes and enable wide-screen displaying
Solution Approach 2:
The patent changes the dimensional arrangement of the common electrode line from a transverse direction (parallel to gate lines) to a longitudinal direction (parallel to data lines), effectively utilizing the column direction dimension to minimize overlap and improve aperture ratio
2Device complexity
If the common electrode line is disposed transversely, then the structure is simple, but the distance between electrodes is increased, causing power consumption and voltage offset issues
Solution Approach 1:
The patent inverts the conventional transverse layout to a longitudinal layout, which simultaneously reduces the distance between electrodes and minimizes the overlapping area, thereby reducing power consumption and voltage offset issues while maintaining structural simplicity
Data Source
AI summary
Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The array substrate comprises a plurality of pixel regions arranged in a two-dimensional matrix, gate lines extending along a row direction of the two-dimensional matrix and data lines extending along a column direction of the two-dimensional matrix, each pixel region including a pixel electrode. The array substrate further comprises at least one common electrode line, and the common electrode line is disposed to be parallel to the data lines.


