Array Substrate Wiring Layout for Common-Line Short-Circuit Resistance
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Solution Overview
Problem
Short circuits frequently occur between voltage-dividing wirings and common wirings in liquid crystal display panels due to particulate impurities or electrostatic discharge, affecting the quality of the displays.
Innovation Solution
The array substrate design includes a base substrate with non-overlapping orthographic projections of common and voltage-dividing wirings, arranged in parallel on the same layer, with staggered patterns to prevent alignment and reduce the risk of short circuits, while also featuring a pixel electrode layer with main and auxiliary electrodes connected to data lines via switching elements to manage electric field intensities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If voltage-dividing wirings and common wirings are arranged on the same layer, then device complexity is reduced, but short circuits occur due to particulate impurities or electrostatic discharge
Solution Approach 1:
The patent transitions from planar arrangement to three-dimensional staggered arrangement of wirings. By offsetting the vertical positions of voltage-dividing wirings and common wirings in the thickness direction, the patent eliminates short circuits while maintaining same-layer connectivity, effectively adding a vertical dimension to resolve the contradiction between simplicity and reliability.
2Manufacturing precision
If voltage-dividing wirings and common wirings are arranged in parallel, then manufacturing precision is improved, but short circuits occur due to alignment
Solution Approach 1:
The patent offsets the wirings in the vertical dimension rather than relying solely on horizontal separation. This staggered arrangement in the thickness direction prevents short circuits even when wirings are arranged in parallel on the same layer, resolving the contradiction between manufacturing precision and short circuit resistance.
3Area of stationary object
If orthographic projections of common wirings and voltage-dividing wirings overlap, then area utilization is improved, but short circuits occur
Solution Approach 1:
The patent allows orthographic projections to overlap in the horizontal plane while preventing short circuits through vertical offsetting in the thickness direction. This resolves the contradiction by utilizing the third dimension to maintain both high area utilization and reliability.
Data Source
AI summary
An array substrate and a display panel are provided. The array substrate includes a base substrate, a first metal layer disposed on the base substrate, a first insulating layer disposed on the first metal layer, a second metal layer disposed on the first insulating layer, a second insulating layer disposed on the second metal layer, and a pixel electrode layer disposed on the second insulating layer. The array substrate further includes common wirings and voltage-dividing wirings. An orthographic projection of the common wirings on the base substrate does not overlap with an orthographic projection of the voltage-dividing wirings on the base substrate.