Array Substrate Compensation Circuit for Uniform Pixel Brightness
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Solution Overview
Problem
OLED displays face challenges in maintaining consistent driving current for uniform illumination due to variations in pixel brightness, which can be exacerbated by manufacturing tolerances and environmental factors.
Innovation Solution
The array substrate incorporates a compensation transistor to provide a compensation voltage signal to the gate electrode of the driving transistor, with a node connecting line and voltage line configuration that ensures a constant driving current, and includes a closed loop design to stabilize the voltage signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional pixel driving circuit is used without compensation, then the device complexity is lower, but the manufacturing precision and consistency of driving current deteriorate due to variations in pixel brightness and environmental factors
Solution Approach 1:
The compensation transistor forms a feedback mechanism where the compensation voltage signal is generated based on the actual pixel brightness conditions and fed back to the gate electrode of the driving transistor. This feedback loop dynamically adjusts the driving current to compensate for variations in pixel brightness, manufacturing tolerances, and environmental factors, thereby improving driving current consistency without requiring complex external control systems.
Solution Approach 2:
The compensation transistor changes the voltage parameter at the gate electrode of the driving transistor by providing a compensation voltage signal. This parameter adjustment allows the driving current to be dynamically modified in response to varying operating conditions, enabling precise control of pixel brightness while maintaining circuit simplicity through on-chip integration.
2Stability of the object's composition
If the first pad orthographic projection overlaps with the node connecting line orthographic projection, then the voltage signal stability is improved through the closed loop design, but the layout complexity and potential interference increase
Solution Approach 1:
The patent resolves the layout conflict by utilizing the vertical dimension (different signal line layers) rather than only the horizontal plane. The first pad is placed in the second signal line layer while the node connecting line is in the first signal line layer, allowing their orthographic projections to overlap without physical interference. This three-dimensional arrangement maintains voltage signal stability through the closed loop while avoiding layout conflicts.
Solution Approach 2:
The closed loop design nests the voltage signal path within itself, where the first pad, voltage connecting line, and node connecting line form a nested configuration that reinforces voltage stability. The overlapping projections are accommodated within the nested structure, allowing the voltage signal to be stabilized without requiring additional space or complex routing.
Data Source
AI summary
An array substrate is provided. The array substrate includes a base substrate, and a plurality of pixel driving circuits configured to drive light emission in a plurality of subpixels. A respective pixel driving circuit includes a driving transistor; a compensation transistor configured to provide a compensation voltage signal to a gate electrode of the driving transistor; the compensation transistor including a source electrode, a drain electrode and a gate electrode; a node connecting line in a first signal line layer; a first pad in a second signal line layer on a side of the first signal line layer away from the base substrate; a voltage line configured to output a constant voltage signal; and a voltage connecting line electrically connecting the first pad with the voltage line. The node connecting line connects the gate electrode of the driving transistor and a drain electrode of the compensation transistor.