Array Substrate Conductive Line Segmentation for ESD Mitigation
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Solution Overview
Problem
Electro-static discharge (ESD) during the manufacturing of TFT-LCD array substrates leads to lower product yield, increased costs, and decreased quality due to static charge accumulation, particularly in plasma environments like vacuum film formation and dry etching, causing electrostatic breakdown.
Innovation Solution
A method involving the formation of conductive lines between signal lines on a base substrate, followed by the creation of via holes and disconnection of these lines to reduce voltage differences and static electricity accumulation, using a patterning process that includes forming insulating layers and transparent conductive layers to disconnect the conductive lines, thereby mitigating ESD.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If tools such as mobile robot support column or roller are used to support or transfer the array substrate, then the array substrate can be moved and supported during manufacturing, but the small contact area creates electrostatic gathering points that cause electrostatic breakdown and damage
Solution Approach 1:
The conductive line is divided into multiple segments by via holes, creating discontinuous conductive paths that prevent electrostatic charge accumulation. The via holes segment the originally continuous conductive line into isolated sections, eliminating the electrostatic gathering effect while maintaining substrate support functionality.
Solution Approach 2:
The harmful continuous conductive path is extracted and removed at specific points through via holes. By taking out portions of the conductive line, the patent eliminates the electrostatic gathering effect while preserving the necessary electrical connections between signal lines.
2Productivity
If voltage differences exist between adjacent signal lines in plasma environment, then plasma processing can be performed, but static charge accumulates on glass surfaces causing electrostatic discharge and reduced product yield
Solution Approach 1:
The conductive lines connect adjacent signal lines to equalize their electrical potential, reducing voltage differences that would otherwise cause electrostatic charge accumulation. By creating equipotential regions between signal lines, the patent eliminates the driving force for electrostatic discharge while maintaining plasma processing capability.
Solution Approach 2:
The patent converts the harmful voltage differences between signal lines into a beneficial equalizing effect. The conductive lines with via holes create controlled electrical pathways that dissipate static charge and equalize potentials, transforming the electrostatic hazard into a protective mechanism against electrostatic discharge.
3Reliability
If conductive lines connect signal lines to equalize potential, then electrostatic charge accumulation is reduced, but the manufacturing process becomes more complex with additional patterning steps
Solution Approach 1:
The conductive line formation is merged with the existing signal line patterning process. The same photomask and deposition steps that create signal lines are used to form the conductive lines, eliminating the need for separate processing steps and reducing overall manufacturing complexity.
Solution Approach 2:
The conductive lines serve multiple functions: they equalize potential between signal lines, provide electrostatic protection, and can be formed using the same manufacturing process as the signal lines themselves. This multi-functionality reduces the need for additional specialized processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces electrostatic charge generation and accumulation, preventing electrostatic breakdown and ensuring the integrity and functionality of the array substrate, thereby improving yield and quality.
Implementation Method 1
forming a conductive line over the base substrate, the conductive line connecting at least two of the plurality of signal lines
Implementation Method 2
removing a portion of the conductive line through the via hole to disconnect the conductive line
Data Source
AI summary
An array substrate, a fabricating method thereof, and a related display device are provided. The method for forming an array substrate can comprises: forming a plurality of signal lines over a base substrate; forming a conductive line over the base substrate, the conductive line connecting at least two of the plurality of signal lines; forming an insulating layer over the base substrate, the plurality of signal lines, and the conductive line; forming a via hole through the insulating layer at a position over the conductive line and between the at least two of the plurality of signal lines; and removing a portion of the conductive line through the via hole to disconnect the conductive line.