Array Substrate Control Capacitor Reduces Leakage Current

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Solution Overview

Problem

In liquid crystal displays, the leakage current in transistors is high due to voltage differences between the source and drain, leading to poor display quality and flickering, which is not adequately reduced by replacing single-gate transistors with dual-gate transistors.

Innovation Solution

An array substrate with a pixel switch comprising at least two transistors connected in series, where the gates are connected to a gate line, and at least one control capacitor is added to each pixel zone with a first electrode at a fixed potential and a second electrode at the same potential as a node between transistors, to maintain the potential of the data signal when the gate scan signal is stopped, thereby reducing voltage differences and leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-gate transistor is used, then the device complexity is low, but the leakage current is high due to voltage fluctuations at floating nodes

Engineering Contradiction:
Improvetransistor structureVSAvoidleakage current
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The pixel switch is divided into multiple transistors connected in series (first transistor T1, second transistor T2, and optionally third transistor T3), with each transistor's gate connected to the gate line. This segmentation allows independent control of each transistor's source-drain voltage, preventing large voltage fluctuations at internal nodes while maintaining relatively simple device structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Storage capacitors (C0, C1, C2) are introduced as intermediary elements to maintain stable potentials at floating nodes (P0, P1, P2) between transistors. These capacitors act as mediators that hold the potential constant during the gate scan signal off-period, preventing parasitic capacitance-induced voltage fluctuations and reducing leakage current through the transistor chain.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If a dual-gate transistor is used, then the attempt to reduce leakage current is made, but the leakage current is not significantly reduced due to potential fluctuations at floating nodes

Engineering Contradiction:
Improveleakage currentVSAvoiddisplay quality
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

Instead of using a dual-gate transistor structure that failed to prevent leakage, the invention segments the pixel switch into multiple single-gate transistors (T1, T2, T3) connected in series, each with gates connected to the gate line. This segmentation combined with storage capacitors effectively stabilizes intermediate nodes and reduces leakage current, achieving better reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Storage capacitors are strategically placed at intermediate nodes between transistors to act as mediators that maintain stable potentials. This approach directly addresses the potential fluctuation problem that caused high leakage in dual-gate structures, ensuring reliable display quality by keeping voltage differences across transistors minimal.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-generated harmful factors

If multiple transistors are connected in series with gates connected to the gate line, then the leakage current is reduced, but the device complexity increases

Engineering Contradiction:
Improveleakage currentVSAvoidpixel switch structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

Multiple transistors (T1, T2, T3) are merged into a single pixel switch structure with all gates connected to the same gate line. This combining approach reduces the need for separate control lines while maintaining the benefits of multiple transistor stages, balancing leakage reduction with acceptable device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate line serves multiple functions by connecting to the gates of all transistors in the pixel switch chain simultaneously. This multi-functional use of the gate line simplifies the control structure while enabling effective leakage current reduction through the series transistor configuration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The addition of control capacitors effectively stabilizes the potential at the connection point of the transistor with the storage capacitor, reducing leakage current and ensuring sufficient charging of the pixel electrode, thereby improving display quality and preventing flickering.

Implementation Method 1

at least one control capacitor is added to each pixel zone with a first electrode at a fixed potential and a second electrode at the same potential as a node between transistors, to maintain the potential of the data signal when the gate scan signal is stopped

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9997546B2Array substrate, display panel, and display device
Publication Date: 2018.06.12 XIAMEN TIANMA MICRO ELECTRONICS
  • US9997546B2 patent drawing
  • US9997546B2 patent drawing
  • US9997546B2 patent drawing

AI summary

The invention discloses an array substrate, a display panel, and a display device, where at least one control capacitor is added to a pixel zone, and the control capacitor has a first electrode at a fixed potential, and a second electrode at the same potential as a node between two adjacent transistors, so that when an active gate scan signal is stopped from being loaded on a gate line, the potential of the second electrode of the control capacitor is controlled to be kept at the potential of data signal loaded on a data line, to thereby lower the difference in voltage between the source and the drain of a transistor associated with the second electrode of the control capacitor so as to keep the potential at a connection point of the transistor with a storage capacitor to be the potential of a data signal loaded on the data line.