Array Substrate Insulation Layout for Overlapping Copper Routing
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Solution Overview
Problem
Mini-LED display technology faces issues with short circuits and reliability due to overlapping copper metal layers, which are prone to defects such as short circuits, open circuits, and electrochemical corrosion, affecting product quality and performance.
Innovation Solution
An array substrate design with at least two organic insulating layers between the first and second conductive layers, increasing the distance between them and preventing copper growth, thereby reducing potential differences and avoiding short circuits and defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If copper metal layers are overlapped to achieve routing functionality, then device functionality is improved, but short circuit defects and reliability deteriorate
Solution Approach 1:
An organic insulating layer is introduced as an intermediary substance between the first and second copper metal layers. This insulating layer prevents direct contact between the overlapping conductive layers, eliminating the short circuit risk while allowing the routing functionality to be maintained through the overlapping structure.
Solution Approach 2:
The insulating structure is segmented into multiple layers including organic insulating layers and inorganic insulating layers. This segmentation allows for optimized insulation performance at different interfaces and regions, providing comprehensive protection against short circuits while maintaining routing functionality.
2Reliability
If distance between conductive layers is increased to prevent short circuits, then reliability is improved, but device complexity increases
Solution Approach 1:
The insulating structure uses composite materials combining organic insulating layers and inorganic insulating layers. This composite approach provides effective insulation with controlled thickness, achieving reliable short circuit prevention without excessive increase in device complexity or overall thickness.
Solution Approach 2:
The insulating layers are strategically positioned only where conductive layers overlap, providing localized insulation where needed. This local quality approach prevents short circuits at critical interfaces without unnecessarily increasing device complexity in non-overlapping regions.
3Reliability
If organic insulating layers are added between conductive layers, then short circuit prevention is improved, but manufacturing process complexity increases
Solution Approach 1:
The organic insulating layer is formed preliminarily before the second copper metal layer is deposited. This preliminary action ensures proper insulation is in place before subsequent processing steps, preventing short circuits from the outset and simplifying the overall manufacturing process by avoiding rework.
Solution Approach 2:
The manufacturing process maintains continuity by integrating the formation of organic insulating layers into the existing fabrication sequence without disrupting the overall flow. The insulating layers are formed as part of the continuous manufacturing process, minimizing interruptions and maintaining ease of manufacture.
Data Source
AI summary
An array substrate includes: a substrate, a first conductive layer, a second conductive layer and at least two organic insulating layers; the first conductive layer is provided on a side of the substrate; the second conductive layer is provided on a side of the first conductive layer away from the substrate, and an orthographic projection of the second conductive layer on the substrate has an overlapped region with an orthographic projection of the first conductive layer on the substrate, the overlapped region includes a via region and a routing region; the at least two organic insulating layers are provided between the first conductive layer and the second conductive layer, and an orthographic projection of the at least two organic insulating layers on the substrate is overlapped with an orthographic projection of the routing region.