Array Substrate Covering Layer for Copper Diffusion Control

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Solution Overview

Problem

In large-size and high-resolution TFT-LCDs, signal delay due to line resistance is a significant issue, and the use of copper as a conductive material is hindered by poor adhesion to substrates, diffusion into insulating layers, and contamination risks, which affect display quality.

Innovation Solution

A covering layer is applied to the array substrate to cover the upper and side surfaces of the circuit pattern, preventing diffusion of low-resistance metals like copper and enhancing adhesion, using materials such as indium tin oxide and molybdenum for the covering layer to protect the insulating layers and maintain conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper is used as conductive material to reduce line resistance, then conductivity is improved, but adhesion to substrate and insulating layers deteriorates

Engineering Contradiction:
ImproveconductivityVSAvoidadhesion
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

A covering layer comprising a first covering layer and a second covering layer is introduced as an intermediary between the copper circuit pattern and the external environment. The first covering layer (e.g., ITO, IZO, or Mo) and second covering layer (e.g., SiO2, Si3N4, or TiN) work together to provide adhesion support while allowing copper to maintain its superior conductivity for reducing line resistance in large-size and high-resolution TFT-LCDs.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If copper is used to form circuit patterns, then line resistance is reduced, but diffusion into insulating layers occurs

Engineering Contradiction:
ImproveconductivityVSAvoidmetal diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The covering layer acts as a protective intermediary that prevents copper atoms from diffusing into the insulating layers. The first covering layer (conductive oxide or metal) and second covering layer (insulating material) create a barrier system that isolates the copper circuit pattern from the insulating layers, thereby eliminating the harmful diffusion effect while preserving copper's low resistance properties.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful diffusion property of copper is effectively removed by introducing the covering layer structure. The first and second covering layers together form a complete protective envelope around the copper circuit pattern, extracting the harmful diffusion characteristic while retaining the beneficial low-resistance conductivity of copper for large-size and high-resolution display applications.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If copper is used for circuit patterns, then conductivity is improved, but contamination of subsequent process equipment occurs

Engineering Contradiction:
ImproveconductivityVSAvoidequipment contamination
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The covering layer serves as a protective intermediary that prevents copper particles and vapors from contaminating subsequent process equipment during PECVD and other manufacturing steps. The first covering layer (e.g., ITO, IZO, or Mo) and second covering layer (e.g., SiO2, Si3N4, or TiN) together form a containment structure that isolates copper from the manufacturing environment, enabling copper to be used for its superior conductivity without causing equipment contamination.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Object-affected harmful factors

If three-layer copper wiring structure with barrier layers is used, then copper diffusion is reduced, but side surfaces remain exposed and adhesion is still poor

Engineering Contradiction:
Improvecopper diffusionVSAvoidadhesion
Core Design Contradiction:
Object-affected harmful factorsVSStrength

Solution Approach 1:

The invention transitions from a planar two-dimensional barrier layer structure to a three-dimensional covering layer structure that envelops the copper circuit pattern from multiple dimensions. The first covering layer and second covering layer together form a volumetric protective structure that covers not only the upper surface but also the side surfaces of the copper pattern, providing comprehensive adhesion support and protection that the conventional two-dimensional barrier layers cannot achieve.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The covering layer introduces a new intermediary structure between the copper wiring and the surrounding environment. This intermediary system, comprising the first covering layer (conductive oxide or metal) and second covering layer (insulating material), provides superior adhesion support compared to conventional barrier layers, while also offering comprehensive protection against diffusion and contamination for large-size and high-resolution TFT-LCD manufacturing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents metal diffusion into insulating layers, enhances adhesion, and maintains conductivity, thereby improving display quality by reducing signal delay and contamination risks in TFT-LCDs.

Implementation Method 1

the covering layer covers an upper surface and side surfaces of the circuit pattern... preventing diffusion of low-resistance metals like copper

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

depositing a circuit pattern film on a base substrate... depositing a covering layer film

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS8487347B2Array substrate and manufacturing method thereof
Publication Date: 2013.07.16 BOE TECHNOLOGY GROUP CO LTD
  • US8487347B2 patent drawing
  • US8487347B2 patent drawing
  • US8487347B2 patent drawing

AI summary

An array substrate comprises a substrate provided with a circuit pattern and covering layers that cover the upper surfaces and side surfaces of respective portions of the circuit pattern.