Array Substrate Recess Layout to Block OLED Display Cracks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Array substrates in display devices, such as LCDs and OLEDs, are prone to cracks in the non-display area, which can propagate to the display area, degrading reliability due to impacts during manufacturing and testing.
Innovation Solution
Incorporating recess patterns in the non-display area that expose the substrate surface beneath the inorganic insulating layers, preventing crack propagation by blocking the path of cracks and using an organic insulating layer to cover these recesses, thereby enhancing the substrate's resistance to impacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inorganic insulating layers are disposed on the array substrate to provide electrical insulation, then the electrical insulation performance is improved, but the substrate becomes more susceptible to crack propagation from the non-display area to the display area
Solution Approach 1:
The patent divides the inorganic insulating layer into multiple segments by forming recess patterns that expose the substrate surface. This segmentation creates discontinuities in the insulating layer, preventing continuous crack propagation paths while maintaining electrical insulation in the functional areas between recesses
Solution Approach 2:
The patent applies different structural qualities to different regions: the inorganic insulating layer is maintained in display areas for electrical insulation, while recess patterns are introduced in non-display areas to block crack paths. This local differentiation allows simultaneous achievement of electrical insulation and crack resistance in respective regions
2Strength
If the array substrate is made more robust to resist impacts during manufacturing and testing, then the resistance to external impacts is improved, but the device complexity increases due to additional structural elements
Solution Approach 1:
The patent incorporates recess patterns during the manufacturing process before final assembly and testing. This preliminary structural preparation ensures crack resistance is built-in from the start, preventing the need for additional protective measures later and avoiding increased device complexity
3Object-affected harmful factors
If recess patterns are formed to expose the substrate surface and block crack paths, then the crack propagation resistance is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent optimizes the dimensions and spacing parameters of recess patterns to achieve effective crack blocking with manufacturable precision. By carefully selecting recess size, depth, and distribution, the design achieves crack resistance while remaining compatible with standard manufacturing capabilities
Data Source
AI summary
An array substrate includes a substrate, a barrier layer disposed on the substrate, a buffer layer disposed on the barrier layer, a first insulating layer disposed on the buffer layer, a second insulating layer disposed on the first insulating layer, a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer. In addition, the wiring patterns are separated from each other, and extend toward a side of the substrate. The array substrate further includes a recess pattern disposed adjacent the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of a top surface of the substrate, and an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the substrate which is exposed by the recess pattern.